Ŕlex Aletŕ home page
Contact information:
Postal adress: UPC - DAC; C6-S103
C/ Jordi Girona 1-3
08034, Barcelona
Phone: (+34) 93 401 16 49
Email: aaleta@ac.upc.edu
Publications:
Graph-partitioning based instruction scheduling for clustered processors,
Alex Aletŕ, Josep M. Codina, Jesús Sánchez and Antonio Gonález;
in proceedings of the 34th International Symposium on Microarchitecture (MICRO'34)
See the: abstract, paper, presentation.
Register Pressure-Based Modulo Scheduling for Clustered VLIW Architectures,
Alex Aletŕ, Josep M. Codina, Jesús Sánchez, Antonio Gonález and David Kaeli;
in proceedings of the 10th Jornadas de Concurrencia
See the: abstract, paper, presentation.
Exploiting Pseudo-schedules to Guide Data Dependence Graph Partitioning,
Alex Aletŕ, Josep M. Codina, Jesús Sánchez, Antonio Gonález and David Kaeli;
in proceedings of the 2002 Conference on Parallel Architectures and Compilation Techniques
See the: abstract, paper, presentation.
Instruction Replication for Clustered Microarchitectures,
Alex Aletŕ, Josep M. Codina, Antonio Gonález and David Kaeli;
in proceedings of the 36th International Symposium on Microarchitecture (MICRO'36)
See the: abstract, paper, presentation.
Removing Communications in Clustered Microarchitectures thorough Instruction Replication,
Alex Aletŕ, Josep M. Codina, Antonio Gonález and David Kaeli;
Transactions on Architecture and Code Optimization (TACO), Vol. 1, Issue 2 (june 2004)
Demystifying On-the-Fly Spill Code
Alex Aletŕ, Josep M. Codina, Antonio Gonález and David Kaeli;
to appear in proceedings of the Conference on Programing Languages Design and Implementation (PLDI'05)
See the: abstract, paper, slides.