myself at New York city Carlos Villavieja Prados
Ph.D Student and Lecturer
cvillavi at ac [dot] upc [dot] edu


Short Cuts

Education

Teaching

Research

Publications

Personal

Contact

Education & Background

    I got my bachelor degree and master at La Salle school of engineering (www.salleURL.edu) . Later on, in 2000, I co-founded an start-up consulting firm (www.cometatech.com). After, I realized teaching and research were the most fun for me and I worked for 2 years at my undergraduate school as lecturer and then in 2004 I moved to the Computer Architecture Department at UPC where I work as a lecturer while I study my PhD. This is one of the greatest place for combining these two activities and enjoy the city were I was born, Barcelona.

Teaching

    I'm teaching PXCSO (Projectes de Xarxes de Computadors i Sistemes Operatius) at the Facultat d'Informatica de Barcelona (FIB).

Research

    My research interests are in the area of Operating Systems and Computer Architecture. At the moment I'm focusing my Phd thesis in Operating Systems for Chip MultiProcessors. I'm working in the efficient usage of shared resources in CMP working in the area of Scheduling and Memory Management.

Publications

  • Luis Velasco and Carlos Villavieja. "Cómo evaluar continua e individualmente en asignaturas basadas en proyectos" Jenui. Barcelona 2009.
  • Carlos Villavieja, Manolis Katevenis, Nacho Navarro, Dionisios Pnevmatikatos, Alex Ramirez, Stamatis Kavadias, Vassilis Papaefstathiou, and Dimitrios S. Nikolopoulos. "Hardware Support for Explicit Communication in Scalable CMP's" Technical Report UPC-DAC-RR-CAP-2009-1. January 2009.
  • C.Villavieja, I. Gelado, A. Ramirez and N. Navarro. "Memory Management on Chip-MultiProcessors with on-chip Memories". To appear in the 4th Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA 2008). July, 2008. Beijing, China.
  • C.Villavieja, I. Gelado, A. Ramirez and N. Navarro. "On-Chip memories, the OS perspective". 3th Industrial HiPEAC Workshop. Hp Labs. June 2008.
  • Mateu L, Villavieja C, Moll F. "Physics-based time-domain model of a magnetic induction microgenerator" IEEE Transactions on Magnetics. 2007;43(3):992-1001.March 2007.
  • C. Villavieja, N.Navarro. "Framework for security and reliability using Multicores". Second International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2006). July 2006.
  • C. Villavieja, I. Gelado, C. Boneti, M. Gil, N.Navarro. "Runtime Power Consumption measurements in Wireless Sensor Networks". First International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2005). July 2005.
  • C. Boneti, C. Villavieja, I. Gelado,Marisa Gil and N.Navarro. Scheduling techniques for SMT processors. First International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2005). July 2005.
  • I. Gelado, C. Villavieja, C. Boneti, M. Gil, X. Martorell. "Distributed Resource Management". First International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2005). July 2005.
  • C. Villavieja, L. Mateu, I. Gelado, F. Martorell, F. Moll, N. Navarro, M.Gil. "Experimental Runtime Power Measurements in Wireless Sensor Networks". Simposio de Computacion Ubicua Inteligencia Ambiental (UCAmI'05). Septiembre 2005.

Personal info

    Besides Computer Architecture Research and Operating Systems research and teaching, I also love playing basketball.

Contact

    POLITECNIC UNIVERSITY OF BARCELONA (UPC)
    Computer Architecture Department
    Despatx D6-109 Campus Nord
    C. Jordi Girona 1-3
    08034 Barcelona,SPAIN
    (+34) 93 4016995

Last updated Friday July 17, 2009.