EDUCATION

Ph.D. degree in Computer Science, Technical University of Catalonia, 2008.
M.S. degree in Computer Science, Technical University of Catalonia, 2002. 

   
     

TEACHING

Associate Professor at the Computer Architecture Department (DAC) of the Technical University of Catalonia (UPC) assigned to the Barcelona School of Informatics (FIB).

Currently:

Former:

  • Operating Systems (SO)
   
     
CURRENT RESEARCH ACTIVITY    
 

My current research work focuses on the challenges posed by next generation data centers, both in terms of Hardware and Software. I'm a member of the High Performance Computing Group at the Computer Architecture Department (DAC) in the UPC. I'm also an associate researcher at the Autonomic Systems and eBusiness Platforms research line in the Barcelona Supercomputer Center (BSC). The line's goal is to understand and to create the core of future large-scale Autonomic Middleware.

 

Research focus

  • Multi-tier Web Services: QoS management, dynamic placement, service virtualization, multi-tier architectures
  • MapReduce Workloads: QoS, workload management, energy and performance tradeoff
  • NoSQL systems: high-level data management, data placement
  • Computer architectures: hybrid data centers, hardware accelerators, dedicated architectures, interconnection networks, new uses for HPC systems

More information can be found at www.bsc.es/autonomic.

Current Research Projects:

  • BG/ASF joint research project (BSC - IBM) with the Scalable Data-centric Computing department at IBM TJ Watson research lab (Yorktown, NY)
  • Adaptive Systems joint research project (BSC - IBM) with the Service management middleware department at IBM TJ Watson research lab (Hawthorne, NY)

Awards and Honors

  • IBM Faculty Award 2010 (link)

PhD Students

  • Jordà Polo (link)
  • Nicolas Poggi (link)
  • Waheed Iqbal (link)

Software:

  • Adaptive MapReduce Scheduler (link)
The Adaptive MapReduce Scheduler is an application-centric multi-job task scheduler for MapReduce workloads developed at BSC. It is a pluggable Hadoop scheduler that automatically adjusts the amount of used resources depending on the performance of jobs and on user-defined high-level business goals. The proposed scheduler relies on estimates of individual job completion times given a particular resource allocation, and uses these estimates so as to maximize each jobs chances of meeting its performance goal. The main objective of the task scheduling mechanism is to enable a MapReduce runtime to dynamically allocate resources in a cluster of machines based on the observed progress rate achieved by the jobs, and the completion time goal associated with each job. The scheduling technique targets a highly dynamic environment in which new jobs can be submitted at any time, and in which MapReduce workloads share physical resources with other workloads, either MapReduce or not. Thus, the actual amount of resources available for MapReduce applications can vary over time. The dynamic scheduler adjusts the resource allocation to all jobs, according to estimates on the completion time given a particular resource allocation. The idea is to further integrate it with cloud-like and virtual environments (such as Amazon EC2, Emotive, etc.) so that if, for instance, a job isn't able to meet its deadline, the scheduler automatically requests more resources.

Invited talks

• "Utility-based management of heterogeneous workloads with fairness goals". Adaptive systems Workshop. CASCON 2007.

Conference organization

• Served as Program Committee for IEEE WWW 2012 (link)

• Served as Program Committee for IEEE Cloud 2011 (link)

• Served as Program Committee for SIMULTECH 2011 (link)

• Served as Research/Industry Chair for IARA Emerging 2010 (link)

• Served as Program Committee for IARA Emerging 2009 (link)

Journal Reviewer

• IEEE Transactions on Parallel and Distributed Systems (TPDS) (link)

• IEEE Transactions on Computers (TC) (link)

• IEEE Transactions on Transactions on Services Computing (TSC) (link)

• Elsevier Information Processing Letters (IPL) (link)

 
     
List of publications    
     
Last update: 29/09/2011
   David Carrera

Associate Professor

Technical University
of Catalonia (UPC)

Computer Architecture
Department (DAC)

dcarrera at ac.upc.edu

Associate Researcher

Autonomic Systems and
eBusiness Platforms

Barcelona Supercomputing
Center (BSC)

david.carrera at bsc.es


Contact: UPC, Dept. AC
Campus Nord, Mod D6 - 112
C/ Jordi Girona, 1-3. E-08034 Barcelona
Tel. +34 93 405 40 62
Fax. +34 93 401 70 55

Reach my office: