José Ramón Herrero


Associate Professor at the Computer Architecture Department (DAC), UPC, BarcelonaTech

Research Area: High Performance Computing

Formerly


Teaching Publications Talks Committees Research Group

J.R. Herrero holds a position as associate professor in the Computer Architecture Department at UPC, BarcelonaTech. Graduated in Computer Science (FIB 1993), Cambridge Proficiency in English (UC, 1994), Postgraduate in Training of University Professors (ICE 1997) and PhD in Computer Science (DAC, UPC 2006).

He has been teaching in the Barcelona School of Informatics (FIB) since 1994. He has taught fourteen different courses corresponding to different areas (Computer Architecture, Operating Systems, Compilers and Parallel Programming), from first-year mandatory subjects to advanced master-level subjects. He has also taught courses at the UPC school in Vilanova i la Geltrú in 1993/94. He has also taught courses abroad at the University of Reading in the UK (2007), ESI-UPB in Burkina Faso (2015), École Centrale de Marseille in France (2015 and 2017), International Islamic University Malaysia (2016) and Universiti Kuala Lumpur in Malaysia (2016), Universiteti Politeknik i Tiranës in Albania (2017), Instituto Superior Tecnico in Lisbon (2017),  Beijing Institute of Technology in China (June 2017) and École Polytechnique de Montréal (Sept 2017). He has tutored students through programs such as ProFEDI, InterCampus, and HPC-Europe and has directed more than thirty final projects or master thesis. He is coauthor of multiple teaching publications and has participated in several teaching innovation projects and the making of two curricula for the FIB. J.R. Herrero has received the Teaching Activity Certification from AQU (2007) and teaching mentions for outstanding quality for five-year periods (UPC 2009 and 2014). He has provided counseling in curriculum making at the National University of Engineering (UNI), Nicaragua, in 1996. He has participated in the working team "Parallel Computing (Supercomputing) Education in Europe: State-of-Art" of Informatics Europe in 2012. He is collaborating with inlab FIB, an innovation and research lab based in the Barcelona School of Informatics, where he lead the Telefónica I+D's uLab at UPC (2013-14), and acts as Academic Director of Security and ICT Infrastructures within the Talent training program. He is also member of the inLab’s Talent Program Advisory Board. Since 2015 he is an Ambassador at Programa Ambassadors de Catalunya of the Catalonia Convention Bureau (CCB).

He has carried out the duties of Vice-Dean Head of Academic Studies in the Barcelona School of Informatics (FIB), (06/2010-06/2013), coordinating the implementation of the Degree in Informatics Engineering. Later, he acted as Vice-dean for Institutional and International Relations (06/2013-03/2015), also at Barcelona School of Informatics (FIB).

He has combined these management and teaching tasks with research in the field of High Performance Computing, and is a participating member of the group named in the same way. This research work is made tangible in dozens of articles published in scientific magazines and international conferences. He has done research stays in several research centers (UCI, USA; IST, Portugal; NTUA, Greece; BSC, Spain; QUB, UK; UJI, Spain). He regularly takes part in program committees and acts as associate editor and reviewer for scientific publications.

JR (2015)

Postal Mail:
Departament d'Arquitectura de Computadors (DAC)
Universitat Politècnica de Catalunya (UPC)
Campus Nord, Mòdul C6, Desp. 206,
C/ Jordi Girona 1-3
08034 Barcelona
Catalunya (Spain)

E-mail: josepr@ac.upc.edu
Tel: +34 93 405 4173 (DAC)
Tel:    +34 93 401 6961 (FIB)
Fax: +34 93 401 7055
Linkedin: http://es.linkedin.com/in/joseramonherrero/
ORCID: http://orcid.org/0000-0002-4060-367X