[Conferences]

[Journals]

[Talks]

[Awards and Merits]

[Patents]

[Book chapters]

[Participation in projects]

[Program committees]

[Participation in reviews]


CONFERENCE PUBLICATIONS

2021

"SafeSU: an Extended Statistics Unit for Multicore Timing Interference" (to appear)
Guillem Cabo, Francisco Bas, Ruben Lorenzo, David Trilla, Sergi Alcaide, Miquel Moreto, Carles Hernandez, Jaume Abella
ETS 2021 36th IEEE European Test Symposium
Virtual, May 24 - 28 2021
"Empirical Analysis of the Specialization of a Diversity Metric per Circuit Path" (to appear)
Sergi Alcaide, Carles Hernandez, Jaume Abella
SELSE 2021 17th Workshop on Silicon Errors in Logic - System Effects
Virtual, April 21 - 22 2021
"MUCH: Exploiting Pairwise Hardware Event Monitor Correlations for Improved Timing Analysis of Complex MPSoCs" (to appear)
Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla
SAC 2021 36th ACM/SIGAPP Symposium On Applied Computing
Virtual, March 22 - 26 2021
"Empirical Evidence for MPSoCs in Critical Systems: The Case of NXP’s T2080 Cache Coherence" (to appear)
Roger Pujol, Hamid Tabani, Jaume Abella, Mohamed Hassan, Francisco J. Cazorla
DATE 2021 24th Design, Automation and Test in Europe Conference
Virtual, February 1-5 2021

2020

"An Academic RISC-V Silicon Implementation Based on Open-Source Components"
Jaume Abella, Guillem Cabo, Francisco J. Cazorla, Adrian Cristal, Max Doblas, Roger Figueras, Alberto Gonzalez, Carles Hernandez, Cesar Hernandez, Leonidas Kosmidis, Vatistas Kostalabros, Ruben Langarita, Neiel Leyva, Guillem Lopez-Paradis, Joan Marimon, Ricardo Martinez, Jonnatan Mendoza, Francesc Moll, Miquel Moreto, Julian Pavon, Cristobal Ramirez, Marco A. Ramirez, Carlos Rojas, Abraham Ruiz, Antonio Rubio, Nehir Sonmez, Victor Soria, Lluis Teres, Osman Unsal, Mateo Valero, Ivan Vargas, Luis Villa
DCIS 2020 35th Conference on Design of Circuits and Integrated Systems
Segovia (Spain), November 18 - 20 2020
"Software-only based Diverse Redundancy for ASIL-D Automotive Applications on Embedded HPC Platforms"
Sergi Alcaide, Leonidas Kosmidis, Carles Hernandez, Jaume Abella
DFT 2020 33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
Frascati, Rome (Italy), October 19 - 21 2020
"HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs"
Sergi Vilardell, Isabel Serra, Roberto Santalla, Enrico Mezzetti, Jaume Abella, Francisco Cazorla
EMSOFT 2020 20th International Conference on Embedded Software
(virtual conference), September 20-25 2020
"De-RISC: Dependable Real-time RISC-V Infrastructure for Safety-critical Space and Avionics Computer Systems" (to appear)
Francisco Gomez Molinero, Miguel Masmano, Vicente Nicolau, Nils-Johan Wessman, Jan Andersson, Jimmy Le Rhun, David Trilla, Felipe Gallego, Guillem Cabo, Jaume Abella
DASIA 2020 25th Data Systems In Aerospace Conference
Bucharest (Romania), September 2020
"SELENE: Self-Monitored Dependable Platform for High-Performance Safety-Critical Systems"
Carles Hernandez, Jose Flich, Roberto Paredes, Charles-Alexis Lefebvre, Imanol Allende, Jaume Abella, David Trilla, Martin Matschnig, Bernhard Fischer, Konrad Schwarz, Jan Kiszka, Martin Ronnback, Johan Klockars, Nicholas McGuire, Franz Rammerstorfer, Christian Schwarzl, Franck Wartel, Dierk Ludemann, Mikel Labayen
DSD 2020 23rd Euromicro Conference on Digital System Design (special session on European Projects)
Portoroz (Slovenia), August 26-28 2020
"The ECSEL FRACTAL Project: A Cognitive Fractal and Secure EDGE based on a unique Open-Safe-Reliable-Low Power Hardware Platform Node"
Aizea Lojo, Luigi Pomante, Tania Di Mascio, Vanessa Orani, Enrico Ferrari, Leire Rubio, Jesus Miguel Ruano, Mikel Labayen Esnaola, Frank K. Gurkaynak, Jaume Abella, Ignacio García Vega
DSD 2020 23rd Euromicro Conference on Digital System Design (special session on European Projects)
Portoroz (Slovenia), August 26-28 2020
"Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from A Space Case Study"
Xavier Palomo, Mikel Fernandez, Sylvain Girbal, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Laurent Rioux
ECRTS 2020 32nd Euromicro Conference on Real-Time Systems
Modena (Italy), July 7-10 2020
"A Cross-Layer Review of Deep Learning Frameworks to Ease Their Optimization and Reuse"
Hamid Tabani, Roger Pujol, Jaume Abella, Francisco J. Cazorla
ISORC 2020 23rd IEEE Symposium On Real-Time Computing
Nashville (Tennessee), May 19-21 2020
"Modeling Contention Interference in Crossbar-based Systems via Sequence-Aware Pairing (SeAP)"
Jeremy Giesen, Pedro Benedicte, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla
RTAS 2020 26th IEEE Real-Time and Embedded Technology and Applications Symposium
Sydney (Australia), April 21-24 2020
"Timing of Autonomous Driving Software: Problem Analysis and Prospects for Future Solutions"
Miguel Alcon, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla
RTAS 2020 26th IEEE Real-Time and Embedded Technology and Applications Symposium
Sydney (Australia), April 21-24 2020
"En-Route: On Enabling Resource Usage Testing for Autonomous Driving Frameworks"
Miguel Alcon, Hamid Tabani, Jaume Abella, Leonidas Kosmidis, Francisco J. Cazorla
SAC 2020 35th ACM/SIGAPP Symposium On Applied Computing
Brno (Czech Republic), March 30 - April 3 2020
"CleanET: Enabling Timing Validation for Complex Automotive Systems"
Sergi Vilardell, Isabel Serra, Hamid Tabani, Jaume Abella, Joan Del Castillo, Francisco J. Cazorla
SAC 2020 35th ACM/SIGAPP Symposium On Applied Computing
Brno (Czech Republic), March 30 - April 3 2020
"IntPred: Flexible, Fast, and Accurate Object Detection for Autonomous Driving Systems"
Hamid Tabani, Matteo Fusi, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla
SAC 2020 35th ACM/SIGAPP Symposium On Applied Computing
Brno (Czech Republic), March 30 - April 3 2020
"On the Reliability of Hardware Event Monitors in MPSoCs for Critical Domains"
Javier Barrera, Leonidas Kosmidis, Hamid Tabani, Enrico Mezzetti, Jaume Abella, Mikel Fernandez, Guillem Bernat, Francisco J. Cazorla
SAC 2020 35th ACM/SIGAPP Symposium On Applied Computing
Brno (Czech Republic), March 30 - April 3 2020
"Software-only Triple Diverse Redundancy on GPUs for Autonomous Driving Platforms"
Sergi Alcaide, Leonidas Kosmidis, Carles Hernandez, Jaume Abella
SELSE 2020 16th Workshop on Silicon Errors in Logic - System Effects
Stanford University (California), February 19 - 20 2020
DSN 2020 50th IEEE/IFIP International Conference on Dependable Systems and Networks - Best of SELSE special session
Valencia (Spain), June 29 2020

2019

"Software Timing Analysis for Complex Hardware with Survivability and Risk Analysis"
Sergi Vilardell, Isabel Serra, Jaume Abella, Joan Del Castillo, Francisco J. Cazorla
ICCD 2019 37th International Conference on Computer Design
Abu Dhabi, United Arab Emirates (U.A.E.), November 17-20 2019
"Performance Analysis and Optimization of Automotive GPUs"
Fabio Mazzocchetti, Pedro Benedicte, Hamid Tabani, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla
SBAC-PAD 2019 33rd International Symposium on Computer Architecture and High Performance Computing
Campo Grande (Brazil), October 15-18 2019
"STT-MRAM for Real-Time Embedded Systems: Performance and WCET Implications"
Kazi Asifuzzaman, Mikel Fernandez, Petar Radojkovic, Jaume Abella, Francisco J. Cazorla
MEMSYS 2019 5th International Symposium on Memory Systems
Washington D.C., September 30 - October 3 2019
"An Approach for Detecting Power Peaks during Testing and Breaking Systematic Pathological Behavior"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DSD 2019 22nd Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Kallithea, Chalkidiki (Greece), August 28-30 2019
"Modeling the Impact of Process Variations in Worst-Case Energy Consumption Estimation"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DSD 2019 22nd Euromicro Conference on Digital System Design (special session on Architectures and Systems for Automotive, Aeronautic, Space and Intelligent Transportation)
Kallithea, Chalkidiki (Greece), August 28-30 2019
"GPU4S: Embedded GPUs in Space"
Leonidas Kosmidis, Jerome Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari
DSD 2019 22nd Euromicro Conference on Digital System Design (special session on European Projects in Digital System Design)
Kallithea, Chalkidiki (Greece), August 28-30 2019
"Generating and Exploiting Deep Learning Variants to Increase Utilization of the Heterogeneous Resources in the Nvidia Xavier"
Roger Pujol, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla
ECRTS 2019 31st Euromicro Conference on Real-Time Systems
Stuttgart (Germany), July 9-12 2019
"ePAPI: Performance Application Programming Interface for embedded platforms"
Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Enrique Fernandez, Francisco J. Cazorla
WCET 2019 19th International Workshop on Worst-Case Execution Time Analysis
Stuttgart (Germany), July 9 2019
"Software-only Diverse Redundancy on GPUs for Autonomous Driving Platforms"
Sergi Alcaide, Leonidas Kosmidis, Carles Hernandez, Jaume Abella
IOLTS 2019 25th IEEE International Symposium on On-Line Testing and Robust System Design
Rhodes Island (Greece), July 1-3 2019
"Assessing the Adherence of an Industrial Autonomous Driving Framework to ISO 26262 Software Guidelines"
Hamid Tabani, Leonidas Kosmidis, Jaume Abella, Guillem Bernat, Francisco J. Cazorla
DAC 2019 56th Design Automation Conference
Las Vegas (Nevada), June 2-6 2019
"Understanding Interference in Critical Multicore Systems" (to appear)
Francisco J. Cazorla, Ian Broster, Jaume Abella, Christos Evripidou, Enrico Mezzetti, Guillem Bernat
DASIA 2019 24th Data Systems In Aerospace Conference
Torremolinos (Spain), June 4-6 2019
"GPU4S: Towards Embedded GPUs in Space" (to appear)
Leonidas Kosmidis, Jerome Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari
DASIA 2019 24th Data Systems In Aerospace Conference
Torremolinos (Spain), June 4-6 2019
"Accurate ILP-based Contention Modeling on Statically Scheduled Multicore Systems"
Xavier Palomo, Enrico Mezzetti, Jaume Abella, Reinder J. Bril, Francisco J. Cazorla
RTAS 2019 25th IEEE Real-Time and Embedded Technology and Applications Symposium
Montreal (Canada), April 16-18 2019
"On Assessing the Viability of Probabilistic Scheduling with Dependent Tasks"
Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla
SAC 2019 34th ACM/SIGAPP Symposium On Applied Computing
Limassol (Cyprus), April 8-12 2019
"High-Integrity GPU Designs for Critical Real-Time Automotive Systems"
Sergi Alcaide, Leonidas Kosmidis, Carles Hernandez, Jaume Abella
DATE 2019 22nd Design, Automation and Test in Europe Conference
Florence (Italy), March 25-29 2019
"LAEC: Look-Ahead Error Correction Codes in Embedded Processors L1 Data Cache"
Pedro Benedicte, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DATE 2019 22nd Design, Automation and Test in Europe Conference
Florence (Italy), March 25-29 2019
"Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement"
Jordi Cardona, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DATE 2019 22nd Design, Automation and Test in Europe Conference
Florence (Italy), March 25-29 2019
"AURIX TC277 Multicore Contention Model Integration for Automotive Applications"
Enrico Mezzetti, Luca Barbina, Jaume Abella, Stefania Botta, Francisco J. Cazorla
DATE 2019 22nd Design, Automation and Test in Europe Conference
Florence (Italy), March 25-29 2019
"Multicore Early Design Stage Guaranteed Performance Assessment for the Space Domain"
Mikel Fernandez, Gabriel Fernandez, Jaume Abella, Francisco J. Cazorla
DATE 2019 22nd Design, Automation and Test in Europe Conference
Florence (Italy), March 25-29 2019
"Embedded GPU benchmarking for High-Performance On-board Data Processing"
Leonidas Kosmidis, Ivan Rodriguez, Jerome Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla
OBDP 2019 European Workshop on On-Board Data Processing
Noordwijk (The Netherlands), February 25-27 2019
"Towards Limiting the Impact of Timing Anomalies in Complex Real-Time Processors"
Pedro Benedicte, Jaume Abella, Carles Hernandez, Enrico Mezzetti, Francisco J. Cazorla
ASP-DAC 2019 24th Asia and South Pacific Design Automation Conference
Tokyo (Japan), January 21-24 2019

2018

"NoCo: ILP-based Worst-Case Contention Estimation for Mesh Real-Time Manycores"
Jordi Cardona, Carles Hernandez, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla
RTSS 2018 39th IEEE Real-Time Systems Symposium
Nashville (Tennessee), December 11-14 2018
"EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems"
Jordi Cardona, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
CODES+ISSS 2018 16th International Conference on Hardware/Software Codesign and System Synthesis
Torino (Italy), September 30 - October 5 2018
"Assessing Time Predictability Features of ARM big.LITTLE Multicores"
Gabriel Fernandez, Francisco J. Cazorla, Jaume Abella, Sylvain Girbal
SBAC-PAD 2018 32nd International Symposium on Computer Architecture and High Performance Computing
Lyon (France), September 24-27 2018
"A Reliable Statistical Analysis of the Best-Fit Distribution for High Execution Times"
Xavier Civit, Joan Del Castillo, Jaume Abella
DSD 2018 21st Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Prague (Czech Republic), August 29-31 2018
"HWP: Hardware Support to Reconcile Cache Energy, Complexity, Performance and WCET"
Pedro Benedicte, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
ECRTS 2018 30th Euromicro Conference on Real-Time Systems
Barcelona (Spain), July 3-6 2018
"Modelling Multicore Contention on the AURIX TC27x"
Enrique Diaz, Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla
DAC 2018 55th Design Automation Conference
San Francisco (California), June 24-28 2018
"Measurement-Based Cache Representativeness on Multipath Programs"
Suzana Milutinovic, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla
DAC 2018 55th Design Automation Conference
San Francisco (California), June 24-28 2018
"Cache Side-Channel Attacks and Time-Predictability in High-Performance Critical Real-Time Systems"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DAC 2018 55th Design Automation Conference
San Francisco (California), June 24-28 2018
"RPR: A Random Replacement Policy with Limited Pathological Replacements"
Pedro Benedicte, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
SAC 2018 33rd ACM/SIGAPP Symposium On Applied Computing
Pau (France), April 9-13 2018
"Design and Integration of Hierarchical-Placement Multi-level Caches for Real-Time Systems"
Pedro Benedicte, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DATE 2018 21st Design, Automation and Test in Europe Conference
Dresden (Germany), March 19-23 2018
"Consumer Electronics Processors for Critical Real-Time Systems: a (Failed) Practical Experience"
Gabriel Fernandez, Francisco J. Cazorla, Jaume Abella
ERTS^2 2018 9th European Congress on Embedded Real Time Software and Systems
Toulouse (France), January 31 - February 2 2018

2017

"Work-in-Progress paper: An Analysis of the Impact of Dependencies on Probabilistic Timing Analysis and Task Scheduling"
Enrico Mezzetti, Jaume Abella, Carles Hernandez, Francisco J. Cazorla
RTSS 2017 38th IEEE Real-Time Systems Symposium
Paris (France), December 5-8 2017
"SEDEA: A Sensible Approach to Account DRAM Energy in Multicore Systems"
Qixiao Liu, Miquel Moreto, Jaume Abella, Francisco J. Cazorla, Mateo Valero
SBAC-PAD 2017 31st International Symposium on Computer Architecture and High Performance Computing
Campinas (Brazil), October 17-20 2017
"Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis"
Mladen Slijepcevic, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DSD 2017 20th Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Vienna (Austria), August 30 - September 1 2017
"Design and Implementation of a Time Predictable Processor: Evaluation with a Space Case Study"
Carles Hernandez, Jaume Abella, Francisco J. Cazorla, Alen Bardizbanyan, Jan Andersson, Fabrice Cros, Franck Wartel
ECRTS 2017 29th Euromicro Conference on Real-Time Systems
Dubrovnik (Croatia), June 27-30 2017
"DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis"
Sergi Alcaide, Carles Hernandez, Antoni Roca, Jaume Abella
DAC 2017 54th Design Automation Conference
Austin (Texas), June 18-22 2017
"On the Tailoring of CAST-32A Certification Guidance to Real COTS Multicore Architectures"
Irune Agirre, Jaume Abella, Mikel Azkarate-Askasua, Francisco J. Cazorla
SIES 2017 12th IEEE International Symposium on Industrial Embedded Systems
Toulouse (France), June 14-16 2017
"Modelling Bus Contention during System Early Design Stages"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
SIES 2017 12th IEEE International Symposium on Industrial Embedded Systems
Toulouse (France), June 14-16 2017
"On uses of Extreme Value Theory fit for industrial-quality WCET analysis"
Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
SIES 2017 12th IEEE International Symposium on Industrial Embedded Systems, Work in Progress session
Toulouse (France), June 14-16 2017
"Software Time Reliability in the Presence of Cache Memories"
Suzana Milutinovic, Jaume Abella, Irune Agirre, Mikel Azkarate-Askasua, Enrico Mezzetti, Tullio Vardanega, Francisco J Cazorla
Ada Europe 2017 22nd International Conference on Reliable Software Technologies
Vienna (Austria), June 12-16 2017
"MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding"
Enrique Diaz, Mikel Fernandez, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
Ada Europe 2017 22nd International Conference on Reliable Software Technologies
Vienna (Austria), June 12-16 2017
"EFL: Enabling Timing Guarantees in Multi-core Processors with Shared Caches"
Carles Hernandez, Nils-Johan Wessman, Leonidas Kosmidis, Alen Bardizbanyan, Jaume Abella, Jan Andersson, Francisco J. Cazorla
DASIA 2017 22nd Data Systems In Aerospace Conference
Gothenburg (Sweden), May 30 - June 1 2017
"EPC Enacted: Integration in an Industrial Toolbox and Use Against a Railway Application"
Enrico Mezzetti, Mikel Fernandez, Alen Bardizbanyan, Irune Agirre, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
RTAS 2017 23rd IEEE Real-Time and Embedded Technology and Applications Symposium
Pittsburgh (Pennsylvania), April 18-21 2017
"Design and Implementation of a Fair Credit-Based Bandwidth Sharing Scheme for Buses"
Mladen Slijepcevic, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DATE 2017 20th Design, Automation and Test in Europe Conference
Lausanne (Switzerland), March 27-31 2017
"Probabilistic Timing Analysis on Time-Randomized Platforms for the Space Domain"
Mikel Fernandez, David Morales, Leonidas Kosmidis, Alen Bardizbanyan, Ian Broster, Carles Hernandez, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Paulo Machado, Luca Fossati
DATE 2017 20th Design, Automation and Test in Europe Conference
Lausanne (Switzerland), March 27-31 2017
"Dynamic Software Randomisation: Lessons Learned From an Aerospace Case Study"
Fabrice Cros, Leonidas Kosmidis, Franck Wartel, David Morales, Jaume Abella, Ian Broster, Francisco J. Cazorla
DATE 2017 20th Design, Automation and Test in Europe Conference
Lausanne (Switzerland), March 27-31 2017
"Time-Randomized Processors for Secure and Reliable High-Performance Computing"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
WP3 2017 1st Workshop on Pioneering Processor Paradigms (in conjunction with HPCA 2017)
Austin (Texas), February 4 2017

2016

"TASA: Toolchain-Agnostic Static Software Randomisation for Critical Real-Time Systems"
Leonidas Kosmidis, Roberto Vargas, David Morales, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
ICCAD 2016 35th International Conference On Computer Aided Design
Austin (Texas), November 7-10 2016
"pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems"
Mladen Slijepcevic, Mikel Fernandez, Carles Hernandez, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
DSD 2016 19th Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Limassol (Cyprus), August 31 - September 2 2016
"PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis"
Francisco J. Cazorla, Jaume Abella, Jan Anderson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-Askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernandez, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernandez, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma
DSD 2016 19th Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Limassol (Cyprus), August 31 - September 2 2016
"A Confidence Assessment of WCET Estimates for Software Time Randomized Caches"
Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
INDIN 2016 14th IEEE International Conference on Industrial Informatics
Poitiers (France), July 18-21 2016
"Measurement-Based Timing Analysis of the AURIX Caches"
Leonidas Kosmidis, Davide Compagnin, David Morales, Enrico Mezzetti, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
WCET 2016 16th International Workshop on Worst-Case Execution Time Analysis
Toulouse (France), July 5 2016
"Mitigating Software Instrumentation Cache Effects in Measurement-Based Timing Analysis"
Enrique Diaz, Jaume Abella, Enrico Mezzetti, Irune Agirre, Mikel Azkarate-Askasua, Tullio Vardanega, Francisco J. Cazorla
WCET 2016 16th International Workshop on Worst-Case Execution Time Analysis
Toulouse (France), July 5 2016
"Resilient Random Modulo Cache Memories for Probabilistically-Analyzable Real-Time Systems"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
IOLTS 2016 22nd IEEE International On-Line Testing Symposium
Sant Feliu de Guixols (Spain), July 4-6 2016
"Modeling RTL Fault Models Behavior to Increase the Confidence on TSIM-based Fault Injection"
Jaime Espinosa, Carles Hernandez, Jaume Abella
IOLTS 2016 22nd IEEE International On-Line Testing Symposium
Sant Feliu de Guixols (Spain), July 4-6 2016
"Random Modulo: a New Processor Cache Design for Real-Time Critical Systems"
Carles Hernandez, Jaume Abella, Andrea Gianarro, Jan Andersson, Francisco J. Cazorla
DAC 2016 53rd Design Automation Conference
Austin (Texas), June 5-9 2016
"Modelling the Confidence of Timing Analysis for Time Randomised Caches"
Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
SIES 2016 11th IEEE International Symposium on Industrial Embedded Systems
Krakow (Poland), May 23-25 2016
"Contention-Aware Performance Monitoring Counter Support for Real-Time MPSoCs"
Javier Jalle, Mikel Fernandez, Jaume Abella, Jan Andersson, Matthieu Patte, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
SIES 2016 11th IEEE International Symposium on Industrial Embedded Systems
Krakow (Poland), May 23-25 2016
"Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems"
Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
SIES 2016 11th IEEE International Symposium on Industrial Embedded Systems
Krakow (Poland), May 23-25 2016
"Modelling Probabilistic Cache Representativeness in the Presence of Arbitrary Access Patterns"
(Best Paper Award Nominee)
Suzana Milutinovic, Jaume Abella, Francisco J. Cazorla
ISORC 2016 19th IEEE Symposium On Real-Time Computing
York (UK), May 17-20 2016
"Validating a Timing Simulator for the NGMP Multicore Processor"
Javier Jalle, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
DASIA 2016 21st Data Systems In Aerospace Conference
Tallin (Estonia), May 10-12 2016
"Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems"
Milos Panic, Carles Hernandez, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
RTAS 2016 22nd IEEE Real-Time and Embedded Technology and Applications Symposium
Vienna (Austria), April 11-14 2016
"Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems"
David Trilla, Javier Jalle, Mikel Fernandez, Jaume Abella, Francisco J. Cazorla
RTAS 2016 22nd IEEE Real-Time and Embedded Technology and Applications Symposium
Vienna (Austria), April 11-14 2016
"A Detailed Methodology to Compute Soft Error Rates in Advanced Technologies"
Marc Riera Villanueva, Ramon Canal, Jaume Abella, Antonio Gonzalez
DATE 2016 19th Design, Automation and Test in Europe Conference
Dresden (Germany), March 14-18 2016
"Supertask: Maximizing Runnable-level Parallelism in AUTOSAR Applications"
Sebastian Kehr, Milos Panic, Eduardo Quiñones, Bert Boeddeker, Jorge Becerril Sandoval, Jaume Abella, Francisco J. Cazorla, Gunter Schafer
DATE 2016 19th Design, Automation and Test in Europe Conference
Dresden (Germany), March 14-18 2016
"Improving Performance Guarantees in Wormhole Mesh NoC Designs"
Milos Panic, Carles Hernandez, Jaume Abella, Antoni Roca Perez, Eduardo Quiñones, Francisco J. Cazorla
DATE 2016 19th Design, Automation and Test in Europe Conference
Dresden (Germany), March 14-18 2016
"Bounding Resource-Contention Interference in the Next-Generation Multipurpose Processor (NGMP)"
Javier Jalle, Mikel Fernandez, Jaume Abella, Jan Andersson, Mathieu Patte, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
ERTS^2 2016 8th European Congress on Embedded Real Time Software and Systems
Toulouse (France), January 27-29 2016
"Sensible Energy Accounting with Abstract Metering for Multicore Systems"
Qixiao Liu, Miquel Moreto, Jaume Abella, Francisco J. Cazorla, Daniel A. Jimenez, Mateo Valero
HiPEAC 2016 11th International Conference on High-Performance Embedded Architectures and Compilers
Prague (Czech Republic), January 18-20 2016

2015

"EPC: Extended Path Coverage for Measurement-based Probabilistic Timing Analysis"
Marco Ziccardi, Enrico Mezzetti, Tullio Vardanega, Jaume Abella, Francisco J. Cazorla
RTSS 2015 36th IEEE Real-Time Systems Symposium
San Antonio (Texas), December 1-4 2015
"Towards Certification-aware Fault Injection Methodologies Using Virtual Prototypes"
Jaime Espinosa, David De Andres, Juan Carlos Ruiz, Carles Hernandez, Jaume Abella
FDL (WiP) 2015 10th IEEE Forum on specification & Design Languages (Work in Progress Session)
Barcelona (Spain), September 14-16 2015
"IEC-61508 SIL 3-compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis"
Irune Agirre, Mikel Azkarate-Askasua, Jon Perez, Carles Hernandez, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
DSD 2015 18th Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Funchal, Madeira (Portugal), August 26-28 2015
"Enabling TDMA Arbitration in the Context of MBPTA"
Milos Panic, Jaume Abella, Carles Hernandez, Eduardo Quiñones, Theo Ungerer, Francisco J. Cazorla
DSD 2015 18th Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Funchal, Madeira (Portugal), August 26-28 2015
"CAP: Communication-aware Allocation Algorithm for Real-Time Parallel Applications on Many-cores"
Milos Panic, Eduardo Quiñones, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
DSD 2015 18th Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Funchal, Madeira (Portugal), August 26-28 2015
"On the Analysis of Timing Behaviour of Time Randomized Caches" (poster)
Pedro Benedicte, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
ACACES 2015 11th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems
Fiuggi (Italy), July 12-18 2015
"Characterizing Fault Propagation in Safety-Critical Processor Designs"
Jaime Espinosa, Carles Hernandez, Jaume Abella
IOLTS 2015 21st IEEE International On-Line Testing Symposium
Elia, Halkidiki (Greece), July 6-8 2015
"WCET Analysis Methods: Pitfalls and Challenges on their Trustworthiness"
Jaume Abella, Carles Hernandez, Eduardo Quiñones, Francisco J. Cazorla, Philippa Ryan Conmy, Mikel Azkarate-askasua, Jon Perez, Enrico Mezzetti, Tullio Vardanega
SIES 2015 10th IEEE International Symposium on Industrial Embedded Systems
Siegen (Germany), June 8-10 2015
"PACO: Fast Average-Performance Estimation for Time-Randomized Caches"
Suzana Milutinovic, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
DAC 2015 52nd Design Automation Conference
San Francisco (California), June 7-11 2015
"Resource Usage Templates and Signatures for COTS Multicore Processors"
Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
DAC 2015 52nd Design Automation Conference
San Francisco (California), June 7-11 2015
"Increasing Confidence on Measurement-Based Contention Bounds for Real-Time Round-Robin Buses"
Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
DAC 2015 52nd Design Automation Conference
San Francisco (California), June 7-11 2015
"Analysis and RTL Correlation of Instruction Set Simulators for Automotive Microcontroller Robustness Verification"
Jaime Espinosa, Carles Hernandez, Jaume Abella, David de Andres, Juan Carlos Ruiz
DAC 2015 52nd Design Automation Conference
San Francisco (California), June 7-11 2015
"Extreme value theory in computer sciences: The case of embedded safety-critical systems"
Jaume Abella, Joan del Castillo, Francisco J. Cazorla, Maria Padilla
ICRA 2015 6th International Conference on Risk Analysis
Barcelona (Spain), May 26-29 2015
"Towards Making a LEON3 Multicore Compatible with Probabilistic Timing Analysis"
Carles Hernandez, Jaume Abella, Francisco J. Cazorla, Jan Andersson, Andrea Gianarro
DASIA 2015 20th Data Systems In Aerospace Conference
Barcelona (Spain), May 19-21 2015
"Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors"
Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla
ISORC 2015 18th IEEE Symposium On Real-Time Computing
Auckland (New Zealand), April 13-17 2015
"Introduction to Partial Time Composability for COTS Multicores"
Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla
SAC 2015 30th ACM/SIGAPP Symposium On Applied Computing
Salamanca (Spain), April 13-17 2015
"Speeding up Static Probabilistic Timing Analysis"
Suzana Milutinovic, Jaume Abella, Damien Hardy, Eduardo Quiñones, Isabelle Puaut, Francisco J. Cazorla
ARCS 2015 28th GI/ITG International Conference on Architecture of Computing Systems
Porto (Portugal), March 24-27 2015
"Low-cost Checkpointing in Automotive Safety-Relevant Systems"
Carles Hernandez, Jaume Abella
DATE 2015 18th Design, Automation and Test in Europe Conference
Grenoble (France), March 9-13 2015
"Timing Analysis of an Avionics Case Study on Complex Hardware/Software Platforms"
Franck Wartel, Leonidas Kosmidis, Adriana Gogonel, Andrea Baldovin, Zoe Stephenson, Benoit Triquet, Eduardo Quinones, Code Lo, Enrico Mezzetti, Ian Broster, Jaume Abella, Liliana Cucu-Grosjean, Tullio Vardanega, Francisco Cazorla
DATE 2015 18th Design, Automation and Test in Europe Conference
Grenoble (France), March 9-13 2015
"Experiences and Results of Parallelisation of Industrial Hard Real-time Applications for the parMERASA Multi-core"
Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jorg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Boddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Casse, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernandez, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
HiRES 2015 3rd Workshop on High-performance and Real-time Embedded Systems (held in conjunction with HiPEAC)
Amsterdam (The Netherlands), January 21 2015

2014

"A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study"
Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
RTSS 2014 35th IEEE Real-Time Systems Symposium
Rome (Italy), December 2-5 2014
"Parallel Many-Core Avionics Systems"
Milos Panic, Eduardo Quiñones, Pavel Zaykov, Carles Hernandez, Jaume Abella, Francisco Cazorla
EMSOFT 2014 14th International Conference on Embedded Software
New Delhi (India), October 12-17 2014
"RunPar: An Allocation Algorithm for Automotive Applications Exploiting Runnable Parallelism in Multicores"
Milos Panic, Sebastian Kehr, Eduardo Quiñones, Bert Boeddeker, Jaume Abella, Francisco Cazorla
CODES+ISSS 2014 12th International Conference on Hardware/Software Codesign and System Synthesis
New Delhi (India), October 12-17 2014
"Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture"
Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Ian Broster, Francisco J. Cazorla
DSD 2014 17th Euromicro Conference on Digital System Design (special session on Mixed Criticality System Design, Implementation and Analysis)
Verona (Italy), August 27-29 2014
"DReAM: Per-Task DRAM Energy Metering in Multicore Systems"
Qixiao Liu, Miquel Moreto, Jaume Abella, Francisco J. Cazorla, Mateo Valero
EUROPAR 2014 20th International EUROPAR Conference. European Conference on Parallel and Distributed Computing
Porto (Portugal), August 25-29 2014
"On the Analysis of SPTA Computational Requirements" (poster)
Suzana Milutinovic, Jaume Abella, Eduardo Quiñones, Damien Hardy, Isabelle Puaut, Francisco J. Cazorla
ACACES 2014 10th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems
Fiuggi (Italy), July 13-19 2014
"PUB: Path Upper-Bounding for Measurement-Based Probabilistic Timing Analysis"
Leonidas Kosmidis, Jaume Abella, Franck Wartel, Eduardo Quinones, Antoine Colin, Francisco J. Cazorla
ECRTS 2014 26th Euromicro Conference on Real-Time Systems
Madrid (Spain), July 8-11 2014
"Heart of Gold: Making the Improbable Happen to Increase Confidence in MBPTA"
Jaume Abella, Eduardo Quinones, Franck Wartel, Tullio Vardanega, Francisco J. Cazorla
ECRTS 2014 26th Euromicro Conference on Real-Time Systems
Madrid (Spain), July 8-11 2014
"On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques"
Jaume Abella, Damien Hardy, Isabelle Puaut, Eduardo Quinones, Francisco J. Cazorla
ECRTS 2014 26th Euromicro Conference on Real-Time Systems
Madrid (Spain), July 8-11 2014
"Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art"
Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Christine Rochange, Tullio Vardanega, Francisco J. Cazorla
WCET 2014 14th International Workshop on Worst-Case Execution Time Analysis
Madrid (Spain), July 8 2014
"Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware"
(Best Paper Award out of 787 submissions)
Leonidas Kosmidis, Jaume Abella, Eduardo Quinones, Franck Wartel, Glenn Farrall, Francisco J. Cazorla
DAC 2014 51st Design Automation Conference
San Francisco (California), June 1-5 2014
"LiVe: Timely Error Detection in Light-Lockstep Safety Critical Systems "
Carles Hernandez, Jaume Abella
DAC 2014 51st Design Automation Conference
San Francisco (California), June 1-5 2014
"Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems"
Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quinones, Francisco J. Cazorla
DAC 2014 51st Design Automation Conference
San Francisco (California), June 1-5 2014
"AHRB: A High-Performance Time-Composable AMBA AHB Bus"
Javier Jalle, Jaume Abella, Eduardo Quinones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
RTAS 2014 20th IEEE Real-Time and Embedded Technology and Applications Symposium
Berlin (Germany), April 15-17 2014
"Bus Designs for Time-Probabilistic Multicore Processors"
Javier Jalle, Leonidas Kosmidis, Jaume Abella, Eduardo Quinones, Francisco J. Cazorla
DATE 2014 17th Design, Automation and Test in Europe Conference
Dresden (Germany), March 24-28 2014
"Hardware Support for Accurate Per-Task Energy Metering in Multicore Systems"
Qixiao Liu, Miquel Moreto, Victor Jimenez, Jaume Abella, Francisco J. Cazorla, Mateo Valero
HiPEAC 2014 9th International Conference on High-Performance Embedded Architectures and Compilers
Vienna (Austria), January 20-22 2014

2013

"Implicit-Storing and Redundant-Encoding-of-Attribute Information in Error-Correction-Codes"
Yiannakis Sazeides, Emre Ozer, Danny Kershaw, Panagiota Nikolaou, Marios Kleanthous, Jaume Abella
MICRO 2013 46th IEEE/ACM International Symposium on Microarchitecture
Davis (California), December 7-11 2013
"Multi-Level Unified Caches for Probabilistically Time Analysable Real-Time Systems"
Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
RTSS 2013 34th IEEE Real-Time Systems Symposium
Vancouver (Canada), December 3-6 2013
"On-Chip Ring Network Designs for Hard-Real Time Systems"
Milos Panic, German Rodriguez, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
RTNS 2013 21st ACM International Conference on Real-Time Networks and Systems
Sophia Antipolis (France), October 16-18 2013
"parMERASA – Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability"
Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, Fernandes Joao, Zaykov Pavel, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, Ian Broster, David George, Eduardo Quiñones, Milos Panic, Francisco Cazorla, Jaume Abella, Sascha Uhrig, Mathias Rohde, Arthur Pyka
DSD 2013 16th Euromicro Conference on Digital System Design
Santander (Spain), September 4-6 2013
"Supporting Industrial Use of Probabilistic Timing Analysis with Explicit Argumentation"
Zoe Stephenson, Jaume Abella, Tullio Vardanega
INDIN 2013 11th IEEE International Conference on Industrial Informatics
Bochum (Germany), July 29-31 2013
"Performance Analysis of Caches in Faulty Real-Time Systems" (poster)
Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
ACACES 2013 9th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems
Fiuggi (Italy), July 14-20 2013
"Assessing the effect on inter-task interferences in real multicores" (poster)
Gabriel Fernandez, Mikel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
ACACES 2013 9th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems
Fiuggi (Italy), July 14-20 2013
"DTM: Degraded Test Mode for Fault-Aware Probabilistic Timing Analysis"
Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quinones, Francisco J. Cazorla
ECRTS 2013 25th IEEE Euromicro Conference on Real-Time Systems
Paris (France), July 10-12 2013
"Upper-bounding Program Execution Time with Extreme Value Theory"
Francisco J. Cazorla, Tullio Vardanega, Eduardo Quiñones, Jaume Abella
WCET 2013 13th International Workshop on Worst-Case Execution Time Analysis
Paris (France), July 9 2013
"Applying Measurement-Based Probabilistic Timing Analysis to Buffer Resources"
Leonidas Kosmidis, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
WCET 2013 13th International Workshop on Worst-Case Execution Time Analysis
Paris (France), July 9 2013
"Deconstructing Bus Access Control Policies for Real-Time Multicores"
Javier Jalle, Jaume Abella, Eduardo Quinones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
SIES 2013 8th IEEE International Symposium on Industrial Embedded Systems
Porto (Portugal), June 19-21 2013
"Measurement-Based Probabilistic Timing Analysis: Lessons from an Integrated-Modular Avionics Case Study"
Franck Wartel, Leonidas Kosmidis, Code Lo, Benoit Triquet, Eduardo Quinones, Jaume Abella, Adriana Gogonel, Andrea Baldovin, Enrico Mezzetti, Liliana Cucu, Tullio Vardanega, Francisco J. Cazorla
SIES 2013 8th IEEE International Symposium on Industrial Embedded Systems
Porto (Portugal), June 19-21 2013
"Achieving Timing Composability with Measurement-Based Probabilistic Timing Analysis"
Leonidas Kosmidis, Eduardo Quinones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
ISORC 2013 16th IEEE Symposium on Object/Component/Service-oriented Real-time Distributed Computing
Paderborn (Germany), June 19-21 2013
"APPLE: Adaptive Performance-Predictable Low-Energy Caches for Reliable Hybrid Voltage Operation"
Bojan Maric, Jaume Abella, Mateo Valero
DAC 2013 50th Design Automation Conference
Austin (Texas), June 2-6 2013
"On the Convergence of Mainstream and Mission Critical Markets"
Sylvain Girbal, Miquel Moreto, Arnaud Grasset, Jaume Abella, Eduardo Quinones, Francisco J Cazorla, Sami Yehia
DAC 2013 50th Design Automation Conference
Austin (Texas), June 2-6 2013
"A Cache Design for Probabilistically Analysable Real-Time Systems"
Leonidas Kosmidis, Jaume Abella, Eduardo Quinones, Francisco J. Cazorla
DATE 2013 16th Design, Automation and Test in Europe Conference
Grenoble (France), March 18-22 2013
"Probabilistic Timing Analysis on Conventional Cache Designs"
Leonidas Kosmidis, Charlie Curtsinger, Eduardo Quinones, Jaume Abella, Emery Berger, Francisco J. Cazorla
DATE 2013 16th Design, Automation and Test in Europe Conference
Grenoble (France), March 18-22 2013
"Efficient Cache Architectures for Reliable Hybrid Voltage Operation Using EDC Codes"
Bojan Maric, Jaume Abella, Mateo Valero
DATE 2013 16th Design, Automation and Test in Europe Conference
Grenoble (France), March 18-22 2013
"The Next Convergence: High-performance and Mission-critical Markets"
Sylvain Girbal, Miquel Moreto, Arnaud Grasset, Jaume Abella, Eduardo Quinones, Francisco J Cazorla, Sami Yehia
HiRES 2013 Workshop on High-performance and Real-time Embedded Systems (held in conjunction with HiPEAC)
Berlin (Germany), January 21-23 2013

2012

"Measurement-Based Probabilistic Timing Analysis for Multi-path Programs"
Liliana Cucu-Grosjean, Luca Santinelli, Michael Houston, Code Lo, Tullio Vardanega, Leonidas Kosmidis, Jaume Abella, Enrico Mezzeti, Eduardo Quinones, Francisco J. Cazorla
ECRTS 2012 24th Euromicro Conference on Real-Time Systems
Pisa (Italy), July 11-13 2012
"Multi-core architectures for parallelized hard real-time applications" (poster)
Milos Panic, Marco Paolieri, Eduardo Quiñones, Jaume Abella, Julian Wolf, Theo Ungerer, Sasch Uhrig, Zlatko Petrov, Francisco J. Cazorla
ACACES 2012 8th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems
Fiuggi (Italy), July 8-14 2012
"ADAM: An Efficient Data Management Mechanism for Hybrid High and Ultra-Low Voltage Operation Caches"
Bojan Maric, Jaume Abella, Mateo Valero
GLSVLSI 2012 22nd Great Lakes Symposium on VLSI
Salt Lake City (Utah), May 3-4 2012

2011

"Control-Flow Recovery Validation Using Microarchitectural Invariants"
Javier Carretero, Jaume Abella, Xavier Vera, Pedro Chaparro
DFT 2011 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
Vancouver (Canada), October 3 - 5 2011
"Design of Complex Circuits Using the Via-Configurable Transistor Array Regular Layout Fabric"
Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González
SOCC 2011 24th IEEE International SoC Conference
Taipei (Taiwan), September 26 - 28 2011
"Towards Improved Survivability in Safety-Critical Systems" (invited paper)
Jaume Abella, Francisco J. Cazorla, Eduardo Quiñones, Dimitris Gizopoulos, Arnaud Grasset, Sami Yehia, Phillipe Bonnot, Riccardo Mariani, Guillem Bernat
IOLTS 2011 17th International On-Line Testing Symposium
Athens (Greece), July 13-15 2011
"RVC-Based Time-Predictable Faulty Caches for Safety-Critical Systems"
Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Yanos Sazeides, Mateo Valero
IOLTS 2011 17th International On-Line Testing Symposium
Athens (Greece), July 13-15 2011
"Online Performance Prediction in Processors with DVFS Capabilities" (poster)
Qixiao Liu, Miquel Moreto, Jaume Abella, Francisco J. Cazorla
ACACES 2011 7th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems
Fiuggi (Italy), July 10-16 2011
"Exploiting Intra-Task Slack Time of Load Operations for DVFS in Hard Real-Time Multi-core Systems"
Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Mateo Valero
ACM SIGBED Review Special Interest Group on Embedded Systems Review Newsletter
September 2011
ECRTS WiP 2011 23rd Euromicro Conference on Real-Time Systems - Work in Progress session
Porto (Portugal), July 6-8 2011
"Hybrid High-Performance Low-Power and Ultra-Low Energy Reliable Caches" (short paper and poster)
Bojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero
CF 2011 8th International Conference on Computing Frontiers
Ischia (Italy), May 3-5 2011
"Fast Time-to-Market with Via-Configurable Transistor Array Regular Fabric: a Delay-Locked Loop Design Case Study"
Marc Pons, Enrique Barajas, Diego Mateo, José Luis González, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González
DTIS 2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era
Athens (Greece), April 6 - 8 2011
"RVC: A Mechanism for Time-Analyzable Real-Time Processors with Faulty Caches"
Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Yanos Sazeides, Mateo Valero
HiPEAC 2011 6th International Conference on High-Performance Embedded Architectures and Compilers
Heraklion, Crete (Greece), January 24-26 2011
"Hardware/Software-Based Diagnosis of Load-Store Queues Using Expandable Activity Logs"
Javier Carretero, Xavier Vera, Jaume Abella, Tanausú Ramírez, Matteo Monchiero, Antonio González
HPCA 2011 17th International Symposium on High-Performance Computer Architecture
San Antonio (Texas), January 12 - 16 2011

2010

"VCTA: A Via-Configurable Transistor Array Regular Fabric"
Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González
VLSI-SoC 2010 18th International Conference on VLSI and System-on-Chip
Madrid (Spain), September 27 - 29 2010
"Use of Randomized Caches in Hard Real-Time Systems" (poster)
Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Guillem Bernat, Emery D. Berger
ACACES 2010 6th International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems
Terrassa (Spain), July 11-17 2010
"The Split Register File"
Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero
DATE 2010 13th Design, Automation and Test in Europe Conference
Dresden (Germany), March 8-12 2010
"Hard Real-Time Capable Multicore Processors for Space Applications" (poster)
Miquel Moreto, Marco Paolieri, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
NPI 2010 1st Networking/Partnering Day at the European Space Agency
Noordwijk (The Netherlands), January 28 2010
"High-Performance Low-Vcc In-Order Core"
Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González
HPCA 2010 16th International Symposium on High-Performance Computer Architecture
Bangalore (India), January 11 - 14 2010

2009

"Low Vccmin Fault-Tolerant Cache with Highly Predictable Performance"
Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio González
MICRO 2009 42nd International Symposium on Microarchitecture
New York (New York), December 14 - 16 2009
"Online Error Detection and Correction of Erratic Bits in Register Files"
Xavier Vera, Jaume Abella, Javier Carretero, Pedro Chaparro, Antonio González
IOLTS 2009 15th International On-Line Testing Symposium
Lisbon (Portugal), June 24 - 27 2009
"End-to-End Register Data-Flow Continuous Self-Test"
Javier Carretero, Pedro Chaparro, Jaume Abella, Xavier Vera, Antonio González
ISCA 2009 36th International Symposium on Computer Architecture
Austin (Texas), June 22 - 24 2009
A version of this paper has been published in DTTC 2008 Intel Design and Test Technolgy Conference (internal Intel conference)
"A Low-Overhead Technique to Protect the Issue Control Logic against Soft Errors"
Javier Carretero, Xavier Vera, Jaume Abella, Pedro Chaparro, Antonio González
SELSE 2009 5th Workshop on Silicon Errors in Logic - System Effects
Stanford University (California), March 24 - 25 2009

2008

"On-line Failure Detection in Memory Order Buffers"
Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella
ITC 2008 International Test Conference
Santa Clara (California), October 28 - 30 2008
"Issue System Protection Mechanisms"
Pedro Chaparro, Jaume Abella, Javier Carretero, Xavier Vera
ICCD 2008 26th International Conference on Computer Design
Lake Tahoe (California), October 12 - 15 2008
"On-Line Failure Detection and Confinement in Caches"
Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González
IOLTS 2008 14th International On-Line Testing Symposium
Rodhes Island (Greece), July 7 - 9 2008
"Soft-Error Protection Mechanisms for In-Order Cores"
Pedro Chaparro, Javier Carretero, Jaume Abella, Xavier Vera
SELSE 2008 4th Workshop on Silicon Errors in Logic - System Effects
Austin (Texas), March 26 - 27 2008

2007

"Penelope: the NBTI-Aware Processor"
Jaume Abella, Xavier Vera, Antonio González
MICRO 2007 40th International Symposium on Microarchitecture
Chicago (Illinois), December 3 - 5 2007
A version of this paper has been published in DTTC 2007 Intel Design and Test Technolgy Conference (internal Intel conference)
"Via-Configurable Transistors Array: A Regular Design Technique to Improve ICs Yield"
Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González
DFM&Y 2007 2nd International Workshop on Design for Manufacturability and Yield (in conjunction with ITC'07)
Santa Clara (California), October 25 - 26 2007
"Fuse: A Technique to Anticipate Failures due to Degradation in ALUs"
Jaume Abella, Xavier Vera, Osman Unsal, Oguz Ergin, Antonio González
IOLTS 2007 13th International On-Line Testing Symposium
Hersonissos-Heraklion, Crete (Greece), July 9 - 11 2007
"NBTI-Resilient Memory Cells with NAND Gates for Highly-Ported Structures"
Jaume Abella, Xavier Vera, Osman Unsal, Antonio González
WDSN 2007 Workshop on Dependable and Secure Nanocomputing (in conjunction with DSN'07)
DSN 2007 Also a poster in the 37th Dependable Systems and Networks
Edinburgh (UK), June 28 2007
"Reducing Soft Error Vulnerability of Data Caches"
Xavier Vera, Jaume Abella, Antonio González, Ronny Ronen
SELSE 2007 3rd Workshop on Silicon Errors in Logic - System Effects
Austin (Texas), April 3 - 4 2007
"Designing Efficient Processors Using Compiler-Directed Optimisations"
Timothy Jones, Michael F.P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin
INTERACT 2007 11th Annual Workshop on the Interaction between Compilers and Computer Architecture (in conjunction with HPCA'07)
Phoenix (Arizona), February 11 2007

2006

"Heterogeneous Way-Size Cache"
Jaume Abella, Antonio González
ICS 2006 20th International Conference on Supercomputing
Cairns (Australia), June 28 - 30 2006
"SAMIE-LSQ: Set-Associative Multiple-Instruction Entry Load/Store Queue"
Jaume Abella, Antonio González
IPDPS 2006 20th International Parallel and Distributed Processing Symposium
Rhodes Island (Greece), April 25 - 29 2006
"Checker Cluster for Soft and Timing Error Detection and Recovery"
Xavier Vera, Jaume Abella, Osman Unsal, Antonio González, Oguz Ergin
SELSE 2006 2nd Workshop on System Effects of Logic Soft Errors
Urbana-Champaign (Illinois), April 11 - 12 2006
"A Heterogeneous Multi-Module Data Cache for VLIW Processors"
Enric Gibert, Jaume Abella, Xavier Vera, Jesús Sánchez, Antonio González
EPIC 2006 5th Explicitly Parallel Instruction Computing Workshop (in conjunction with CGO'06)
New York (New York), March 26 2006

2005

"Compiler Directed Early Register Release"
Timothy Jones, Michael F.P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin
PACT 2005 14th International Conference on Parallel Architectures and Compilation Techniques
Saint Louis (Missouri), September 17 - 19 2005
"Variable-Based Multi-module Data Caches for Clustered VLIW Processors"
Enric Gibert, Jaume Abella, Jesús Sánchez, Xavier Vera, Antonio González
PACT 2005 14th International Conference on Parallel Architectures and Compilation Techniques
Saint Louis (Missouri), September 17 - 19 2005
"Software Directed Issue Queue Power Reduction"
Timothy Jones, Michael F.P. O'Boyle, Jaume Abella, Antonio González
HPCA 2005 11th International Symposium on High Performance Computer Architecture
San Francisco (California), February 12 - 16 2005
"Inherently Workload-Balanced Clustered Microarchitecture"
Jaume Abella, Antonio González
IPDPS 2005 19th International Parallel and Distributed Processing Symposium
Denver (Colorado), April 4 - 8 2005

2004

Poster: "Power and Complexity Aware Microarchitectures" (powerpoint slides)
Jaume Abella, Ramon Canal, Antonio González
IAF-EMEA 2004 9th Intel EMEA Academic Forum
Barcelona (Spain), April 20 - 22 2004
"Low-Complexity Distributed Issue Queue"
Jaume Abella, Antonio González
HPCA 2004 10th International Symposium on High Performance Computer Architecture
Madrid (Spain), February 14 - 18 2004

2003

"Power-Aware Adaptive Issue Queue and Register File"
Jaume Abella, Antonio González
HiPC 2003 International Conference on High Performance Computing
Hyderabad (India), December 17 - 20 2003
"On Reducing Register Pressure and Energy in Multiple-Banked Register Files"
Jaume Abella, Antonio González
ICCD 2003 21st International Conference on Computer Design
San Jose (California), October 13 - 15 2003
"Power Efficient Data Cache Designs"
Jaume Abella, Antonio González
ICCD 2003 21st International Conference on Computer Design
San Jose (California), October 13 - 15 2003
"Optimizing Program Locality through CMEs and GAs"
Xavier Vera, Jaume Abella, Antonio González, Josep Llosa
PACT 2003 12th International Conference on Parallel Architectures and Compilation Techniques
New Orleans (Louisiana), September 27 - October 1 2003

2002

"Near-Optimal Loop Tiling by means of Cache Miss Equations and Genetic Algorithms"
Jaume Abella, Antonio González, Josep Llosa, Xavier Vera
CRTPC 2002 Workshop on Compiler/Runtime Techniques for Parallel Computing (in conjunction with ICPP02)
Vancouver (Canada), August 18-21 2002
"Near-Optimal Loop Tiling by means of Cache Miss Equations and Genetic Algorithms" (Jornadas version)
Jaume Abella, Antonio González, Josep Llosa, Xavier Vera
XIII Jornadas de Paralelismo
Lleida (Spain), September 9-11 2002.

2000

"The MHAOTEU Toolset"
Jaume Abella, Sid Ahmed Ali Touati, Alan Anderson, Carlos Ciuraneta, Josep M. Codina, Min Dai, Christine Eisenbeis, Grigori Fursin, Antonio González, Josep Llosa, Michael O'Boyle, Andry Randrianatoavina, Jesus Sánchez, Olivier Temam, Xavier Vera, Gregory Watts
IMACS 2000 Agent-Based Simulation, Planning and Control of the 16th IMACS World Congress 2000, on Scientific Computation, Applied Mathematics and Simulation
Lausanne (Switzerland), August 21-25 2000

JOURNAL PUBLICATIONS

"On the Definition of Resource Sharing Levels to Understand and Control the Impact of Contention in Multicore Processors" (to appear)
Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla
SAE Tech SAE Technical Papers
to appear
"Worst-Case Energy Consumption: A New Challenge for Battery-Powered Critical Devices"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
IEEE TSUSC IEEE Transactions on Sustainable Computing
to appear
"Performance Analysis and Optimization Opportunities for NVIDIA Automotive GPUs" (to appear)
Hamid Tabani, Fabio Mazzocchetti, Pedro Benedicte, Jaume Abella, Francisco J. Cazorla
JPDC Elsevier Journal of Parallel and Distributed Computing
to appear
"Surrogate Applications for Early Design Stage Multicore Contention Modeling"
Gabriel Fernandez, Jaume Abella, Guillem Bernat, Francisco J. Cazorla
IEEE TETC IEEE Transactions on Emerging Topics in Computing - Special issue on Advanced Command, Control and On-Board Data Processing for Space Avionic Systems
January 2021
"HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs"
Sergi Vilardell, Isabel Serra, Roberto Santalla, Enrico Mezzetti, Jaume Abella, Francisco Cazorla
IEEE TCAD IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
November 2020
"Predictive Reliability and Fault Management in Exascale Systems: State of the Art and Perspectives"
Ramon Canal, Carles Hernandez, Rafa Tornero, Giuseppe Massari, Federico Reghenzani, William Fornaciari, Marina Zapater, David Atienza, Jaume Abella
ACM Computing Surveys (2020)
September 2020
"GPU4S: Embedded GPUs in Space - Latest Project Updates"
Leonidas Kosmidis, Ivan Rodriguez Ferrandez, Alvaro Jover, Sergi Alcaide, Jerome Lachaize, Jaume Abella, Oliver Notebaert, Francisco J. Cazorla, David Steenari
Elsevier MICPRO (2020) Elsevier Journal of Microprocessors and Microsystems
September 2020
"Multi-Core Devices for Safety-Critical Systems: A Survey"
Jon Perez, Roman Obermaisser, Jaume Abella, Francisco J. Cazorla, Kim Gruttner, Irune Agirre, Hamidreza Ahmadian, Imanol Allende
ACM Computing Surveys (2020)
August 2020
"De-RISC – Dependable Real-time Infrastructure for Safety-critical Computer Systems"
Paco Gomez, Miguel Masmano, Vicente Nicolau, Jan Andersson, Jimmy Le Rhun, David Trilla, Felipe Gallego, Guillem Cabo, Jaume Abella
AUJ Ada User Journal
June 2020
"On the Use of Probabilistic Worst-Case Execution Time Estimation for Parallel Applications in High Performance Systems"
Matteo Fusi, Fabio Mazzocchetti, Albert Farres, Leonidas Kosmidis, Ramon Canal, Francisco J. Cazorla, Jaume Abella
MDPI Mathematics Special issue on Supercomputing and Mathematics
March 2020
"Randomization for Safer, more Reliable and Secure, High-Performance Automotive Processors"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
IEEE Design & Test Special Issue on Secure Automotive Systems
December 2019
"Increasing the Reliability of Software Timing Analysis for Cache-Based Processors"
Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla
IEEE TC IEEE Transactions on Computers
June 2019
"Probabilistic Worst-Case Timing Analysis: Taxonomy and Comprehensive Survey"
Francisco J. Cazorla, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernandez, Jaume Abella, Tullio Vardanega
ACM Computing Surveys (2019)
February 2019
"Locality-aware Cache Random Replacement Policies"
Pedro Benedicte, Francisco J. Cazorla, Jaume Abella, Carles Hernandez
Elsevier JSA (2019) Elsevier Journal of Systems Architecture
February 2019
"Time-randomized Wormhole NoCs for Critical Applications"
Mladen Slijepcevic, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
ACM JETC (2019) ACM Journal on Emerging Technologies in Computing Systems
January 2019
"Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain"
Sergi Alcaide, Leonidas Kosmidis, Hamid Tabani, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
IEEE Micro (2018) Special Issue on Hardware Acceleration
November 2018
"EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems" (presented at CODES+ISSS 2018 conference)
Jordi Cardona, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
IEEE TCAD (2018) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
November 2018
"Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262"
Irune Agirre, Francisco J. Cazorla, Jaume Abella, Carles Hernandez, Enrico Mezzetti, Mikel Azkarate-Askasua, Tullio Vardanega
IEEE TR (2018) IEEE Transactions on Reliability
September 2018
"Reconciling Time Predictability and Performance in Future Computing Systems"
Francisco J. Cazorla, Jaume Abella, Enrico Mezzetti, Carles Hernandez, Tullio Vardanega, Guillem Bernat
IEEE Design & Test (2018) Special Issue on Time-Critical Systems Design
April 2018
"High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V"
Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla
IEEE Micro (2018) Special Issue on Architectural support for ISO26262 compliance
January 2018
"Execution time distributions in embedded safety-critical systems using extreme value theory"
Joan del Castillo, Maria Padilla, Jaume Abella, Francisco J. Cazorla
IJDATS (2017) International Journal of Data Analysis Techniques and Strategies (Special Issue on: Applications of Risk Analysis and Analytics in Engineering and Economics)
December 2017
"Adapting TDMA Arbitration for Measurement-Based Probabilistic Timing Analysis"
Milos Panic, Jaume Abella, Eduardo Quinones, Carles Hernandez, Theo Ungerer, Francisco J. Cazorla
Elsevier MICPRO (2017) Elsevier Journal of Microprocessors and Microsystems
June 2017
"Measurement-Based Worst-Case Execution Time Estimation Using the Coefficient of Variation" --> public implementation available: MBPTA-CV 1.0
Jaume Abella, Maria Padilla, Joan del Castillo, Francisco J. Cazorla
ACM TODAES (2017) ACM Transactions on Design Automation of Electronic Systems
June 2017
Presented at the 38th IEEE Real-Time Systems Symposium (RTSS) 2017
"On the Assessment of Probabilistic WCET Estimates Reliability for Arbitrary Programs"
Suzana Milutinovic, Jaume Abella, Francisco J. Cazorla
EURASIP JES (2017) EURASIP Journal on Embedded Systems
April 2017
"Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration"
Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
IEEE TC (2017) IEEE Transactions on Computers
April 2017
"Aging Assessment and Design Enhancement of Randomized Cache Memories"
David Trilla, Carles Hernandez, Jaume Abella, Francisco J. Cazorla
IEEE TDMR (2017) IEEE Transactions on Device and Materials Reliability
March 2017
"Fitting Processor Architectures for Measurement-Based Probabilistic Timing Analysis"
Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Carles Hernandez, Andrea Gianarro, Ian Broster, Francisco J. Cazorla
Elsevier MICPRO (2016) Elsevier Journal of Microprocessors and Microsystems
November 2016
"DReAM: an Approach to Estimate Per-Task DRAM Energy in Multicore Systems"
Qixiao Liu, Miquel Moreto, Jaume Abella, Francisco J. Cazorla, Mateo Valero
ACM TODAES (2016) ACM Transactions on Design Automation of Electronic Systems
November 2016
"Parallelizing Industrial Hard Real-time Applications for the parMERASA Multi-core"
Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jorg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Boddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Casse, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernandez, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
ACM TECS (2016) ACM Transactions on Embedded Computing Systems
July 2016
"Sensible Energy Accounting with Abstract Metering for Multicore Systems"
Qixiao Liu, Miquel Moreto, Jaume Abella, Francisco J. Cazorla, Daniel A. Jimenez, Mateo Valero
ACM TACO (2016) ACM Transactions on Architecture and Code Optimization (presented at HiPEAC 2016 conference)
January 2016
"Timely Error Detection for Effective Recovery in Light-Lockstep Automotive Systems"
Carles Hernandez, Jaume Abella
IEEE TCAD (2015) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
November 2015
"Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems"
Enrico Mezzetti, Marco Ziccardi, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
LITES (2015) Leibniz Transactions on Embedded Systems
Volume 2, issue 1
"Efficient Cache Designs for Probabilistically Analysable Real-Time Systems"
Leonidas Kosmidis, Jaume Abella, Eduardo Quinones, Francisco J. Cazorla
IEEE TC (2014) IEEE Transactions on Computers
December 2014
"Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments"
Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
IEEE Micro (2014) Special Series on Harsh Chips
November-December 2014
"Hybrid Cache Designs for Reliable Hybrid High and Ultra-Low Voltage Operation"
Bojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero
ACM TODAES (2014) ACM Transactions on Design Automation of Electronic Systems
November 2014
"Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC Codes"
Bojan Maric, Jaume Abella, Mateo Valero
IEEE TVLSI (2014) IEEE Transactions on VLSI Systems
October 2014
"Per-task Energy Accounting in Computing Systems"
Qixiao Liu, Victor Jimenez, Miquel Moreto, Jaume Abella, Francisco J. Cazorla, Mateo Valero
IEEE CAL (2014) IEEE Computer Architecture Letters
July-December 2014
"Hardware Support for Accurate Per-Task Energy Metering in Multicore Systems"
Qixiao Liu, Miquel Moreto, Victor Jimenez, Jaume Abella, Francisco J. Cazorla, Mateo Valero
ACM TACO (2013) ACM Transactions on Architecture and Code Optimization (presented at HiPEAC 2014 conference)
December 2013
"PROARTIS: Probabilistically Analysable Real-Time Systems"
Francisco J. Cazorla, Eduardo Quiñones, Tullio Vardanega, Liliana Cucu, Benoit Triquet, Guillem Bernat, Emery Berger, Jaume Abella, Franck Wartel, Michael Houston, Luca Santinelli, Leonidas Kosmidis, Code Lo, Dorin Maxim
ACM TECS (2013) ACM Transactions on Embedded Computing Systems - Special issue on Probabilistic Embedded Computing
May 2013
"Implementing End-to-End Register Data-Flow Continuous Self-Test"
Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González
IEEE TC (2011) IEEE Transactions on Computers
August 2011
"Compiler Directed Issue Queue Energy Reduction"
Tim Jones, Michael F.P. O'Boyle, Jaume Abella, Antonio González
Transactions on HiPEAC (2011) Transactions on High-Performance Embedded Architectures and Compilers IV, Lecture Notes on Computer Science
Volume 6760, 2011
"Microarchitectural Online Testing for Failure Detection in Memory Order Buffers"
Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella
IEEE TC (2010) IEEE Transactions on Computers - Special Issue on System Level Design of Reliable Architectures
May 2010
"Electromigration for Microarchitects"
Jaume Abella, Xavier Vera
ACM Computing Surveys (2010)
February 2010
"Selective Replication: a Lightweight Technique for Soft Errors"
Xavier Vera, Javier Carretero, Jaume Abella, Antonio González
ACM ToCS (2009) ACM Transactions on Computer Systems
December 2009
"Energy-Efficient Register Caching with Compiler Assistance"
Tim Jones, Michael F.P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin
ACM TACO (2009) ACM Transactions on Architecture and Code Optimization
October 2009
"Exploring the Limits of Early Register Release: Exploiting Compiler Analysis"
Tim Jones, Michael F.P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin
ACM TACO (2009) ACM Transactions on Architecture and Code Optimization
September 2009
"Refueling: Preventing Wire Degradation due to Electromigration"
Jaume Abella, Xavier Vera, Osman Unsal, Oguz Ergin, Antonio González, James W. Tschanz
IEEE Micro (2008) Special Issue on Existential Architectures - The Metaphysics of Computer Design
November-December 2008
"An Accurate Cost Model for Guiding Data Locality Transformations"
Xavier Vera, Jaume Abella, Josep Llosa, Antonio González
ACM TOPLAS (2005) Transactions on Programming Languages and Systems
Volume 27, Issue 5, September 2005
"IATAC: A Smart Predictor to Turn-off L2 Cache Lines"
Jaume Abella, Antonio González, Xavier Vera, Michael F.P. O'Boyle
ACM TACO (2005) ACM Transactions on Architecture and Code Optimization
March 2005
"Power- and Complexity-Aware Issue Queue Designs"
Jaume Abella, Ramon Canal, Antonio González
IEEE Micro (2003) Special Issue on Power- and Complexity-Aware Design
September-October 2003

TALKS

"Tackling Safety in Space with RISC-V Based Platforms"
Jaume Abella
Talk at the "RISC-V Summit", Security and Functional Safety track
(virtual), December 2020
"Resilient high-performance and low-power platforms for safety-critical real-time Systems"
Jaume Abella
Invited talk at the "Low-Energy Heterogeneous Computing Workshop" colocated with FPL2020
(virtual), September 2020
"Functional Safety"
Jaume Abella, Roger Marsal
Master seminar (2 days) at Universitat Politectica de Catalunya (UPC), as part of the course "Automotive Embedded Systems"
Barcelona (Spain), May 2020
"Functional Safety"
Jaume Abella, Roger Marsal
Master seminar (1.5 days) at Universitat Politectica de Catalunya (UPC), as part of the course "Automotive Embedded Systems"
Barcelona (Spain), February 8-11 2019
"Functional Safety"
Jaume Abella, Roger Marsal
Master seminar (1.5 days) at Universitat Politectica de Catalunya (UPC), as part of the course "Automotive Embedded Systems"
Barcelona (Spain), February 1-2 2018
"A Practical Methodology to Tightly Upperbound Contention in COTS Multicores"
Jaume Abella
Invited talk at the Workshop "SAFURE: Safety And Security By Design For Interconnected Mixed-Critical Cyber-Physical Systems"
Manchester (UK), January 22 2018
"Advanced topics in computer science: a MBPTA insert"
Jaume Abella, Francisco J. Cazorla
Master seminar (5-days) at the Università degli Studi di Padova
Padova (Italy), November 8-16 2016
"Efficient Arbitration through Randomization for Shared Resources in Multicores"
Jaume Abella
Invited talk at the 4th International Workshop on the Integration of Mixed-Criticality Subsystems on Multicore and Manycore Processors (in conjunction with HiPEAC 2014)
Prague (Czech Republic), January 18 2016
"Chip-Level Platform for probabilistic WCET guarantees"
Jaume Abella
Invited talk at the European Mixed-Criticality Cluster Workshop
Brussels (Belgium), July 2 2014
"PROARTIS – Probabilistically Analysable Real-Time Systems"
Jaume Abella
Invited talk at the 2nd International Workshop on the Integration of Mixed-Criticality Subsystems on Multicore and Manycore Processors (in conjunction with HiPEAC 2014)
Vienna (Austria), January 21 2014
"Time Predictable Multicores for Real-Time Systems"
Jaume Abella
Master seminar at the Universidad Carlos III
Madrid (Spain), November 15 2012
"Reliable and Time Predictable Multicores for Real-Time Systems"
Francisco Cazorla, Jaume Abella
Invited talk at ARM
Cambridge (UK), March 8 2012
"Reliability and Power in Safety-Critical Systems: A Hardware Perspective"
Jaume Abella
Invited talk at the HiPEAC Computing Systems Week
Barcelona (Spain), November 2-4 2011
"Results from PROARTIS"
Jaume Abella, Francisco J. Cazorla
Invited talk at the European Space Agency (ESA) Workshop on Avionics Data, Control and Software Systems (ADCSS)
Noordwijk (The Netherlands), October 25-27 2011
"Dynamic Errors: Symptoms and Solutions"
Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio Gonzalez
Invited talk at the Industrial track of the 14th International EUROPAR Conference. European Conference on Parallel and Distributed Computing
Las Palmas de Gran Canaria (Spain), August 27 - 29 2008
"Surviving Errors in Multi-Core Environments"
Jaume Abella, Xavier Vera
Invited talk at the Special session on Reconfiguration and Fault Tolerance in Future Massively Parallel Multi-Core Chips in the 13th International On-Line Testing Symposium (IOLTS)
Hersonissos-Heraklion, Crete (Greece), July 9 - 11 2007

AWARDS AND MERITS

Awarded a Ramon y Cajal senior postdoctoral fellowship (years 2014-2019) by the Spanish Ministry of Economy and Competitiveness, reference RYC-2013-14717
Jaume Abella
Awarded a Beatriu de Pinos postdoctoral fellowship (years 2010-2012) by the Generalitat de Catalunya, reference BP-B 00260
Jaume Abella
Awarded a Torres Quevedo postdoctoral fellowship at Intel Corporation (year 2009-2011) by the Spanish Ministry of Science and Innovation, reference PTQ-08-02-07333
(withdrawn in Nov-2009 due to joining the BSC)
Jaume Abella
Awarded "Premio Duran Farell de Investigacion Tecnologica" to the best Research Project in Technology in Spain (year 2008)
Project: Diseño Eficiente de Procesadores Mediante Particionado de Componentes (Efficient Processor Design by Clustering Resources)
Project leader: Antonio Gonzalez
Project members: Jaume Abella, Alex Aleta, Stefan Bieschewschi, Qiong Cai, Ramon Canal, Josep M Codina, Pedro Chaparro, Enric Gibert, Jose Gonzalez, Fernando Latorre, Grigorios Magklis, Pedro Marcuello, Joan Manuel Parcerisa, Jesus Sanchez, Xavier Vera
Project member affiliations: Intel Barcelona Research Center and UPC
Awarded "Premi Extraordinari de Doctorat de la UPC" to the best thesis in the UPC in the area of Information and Communications Technology (year 2005)
Jaume Abella
Awarded a FPU (Formacion del Profesorado Universitario) Phd grant at UPC (year 2003-2007) by the Spanish Ministry of Education, Culture and Sports, reference AP2002-3677
(withdrawn in May-2005 due to joining Intel Corporation)
Jaume Abella
First rank among all students (174 people) achieving the Master of Science degree in Computers (Ingeniero en Informatica) at the UPC (year 2002)
Jaume Abella
Awarded "Premio Nacional de Fin de Carrera" for achieving the top Spanish student's academic record in Computer Systems and Management Technical Engineering (year 2000)
Jaume Abella
First rank among all students (39 people) achieving the Bachelor of Science degree in Computer Systems (Ingeniero Tecnico en Informatica de Sistemas) at the UPC (year 2000)
Jaume Abella

PATENTS FILED AND ISSUED

"Device for Controlling the Access to a Cache Structure"
Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
USPTO Patent No. 9,396,119, published 19-July-2016
EU Application No. EP20120184447, Patent No. --------, published 19-March-2014
Japan Application No. JP2014059871, Patent No. --------, published 3-April-2014
China Application No. CN103823763, Patent No. --------, published 28-May-2014
"On-line Testing for Decode Logic"
Pedro Chaparro, Jaume Abella, Xavier Vera, Javier Carretero
USPTO Patent No. 8,069,376, issued 29-November-2011
"Memory Apparatuses with Low Supply Voltages"
Jaume Abella, Xavier Vera, Javier Carretero, Pedro Chaparro, Antonio González
USPTO Patent No. 8,477,558, issued 2-July-2013
"Disabling Cache Portions During Low Voltage Operations"
Chris Wilkerson, Muhammad M. Khellah, Vivek De, Ming Y. Zhang, Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio González
International Application No. PCT/US2009/058026
USPTO Patent No. 8,291,168, issued 16-October-2012 ("Disabling Cache Portions During Low Voltage Operations")
USPTO Patent No. 8,103,830, issued 24-January-2012 ("Disabling Cache Portions During Low Voltage Operations")

Japan Patent No. JP5479479, issued 23-April-2014 ("Disabling Cache Portions During Low Voltage Operations")
China Patent No. CN101714106B, issued 25-September-2013 ("Disabling Cache Portions During Low Voltage Operations")
Taiwan Patent No. TWI420294, issued 21-December-2013 ("Disabling Cache Portions During Low Voltage Operations")
Republic of Korea Patent No. 1020117007404, Patent No. --------, published 9-June-2011 ("Disabling Cache Portions During Low Voltage Operations")

"Improved Capacity Register File"
Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera
USPTO Application No. 20090150649, ABANDONED, published 11-June-2009
"Mechanism for Soft Error Detection and Recovery in Issue Queues"
Pedro Chaparro, Xavier Vera, Jaume Abella, Javier Carretero
USPTO Application No. 20090150653, ABANDONED, published 11-June-2009
"Correcting Intermittent Errors in Data Storage Structures"
Jaume Abella, Xavier Vera, Javier Carretero
USPTO Patent No. 7,747,913, issued 29-June-2010
"Protecting Data Storage Structures from Intermittent Errors"
Xavier Vera, Jaume Abella, Javier Carretero, Antonio González
USPTO Patent No. 8,352,812, issued 8-January-2013
"Reduction of Effect of Ageing on Registers"
Jaume Abella, Xavier Vera, Antonio González
International Application No. PCT/ES2006/070168
USPTO Patent No. 8,578,137, issued 5-November-2013 ("Reducing Aging Effect on Registers")

"Memory Content Inverting to Minimize NBTI Effects"
Jaume Abella, Xavier Vera, Javier Carretero, Jose-Alejandro Piñeiro, Antonio González
USPTO Patent No. 7,577,015, issued 18-August-2009
"Cache Sharing Based Thread Control"
Jaideep Moses, Jose-Alejandro Piñeiro, Don Newell, Enric Gibert, Ravishankar Iyer, Jaume Abella, Josep M. Codina, Ramesh Illikkal, Pedro López, Fernando Latorre, Srihari Makineni, Antonio González
USPTO Patent No. 7,895,415, issued 22-February-2011
"Selectively Protecting a Register File"
Xavier Vera, Jaume Abella, Jose-Alejandro Piñeiro, Antonio González, Ronny Ronen
USPTO Patent No. 7,689,804, issued 30-March-2010
"NBTI-Resistant Memory Cells with NAND Gates"
Jaume Abella, Xavier Vera, Osman Unsal, Antonio González
International Application No. PCT/ES2006/000542
USPTO Patent No. 7,447,054, issued 4-November-2008 ("NBTI-Resilient Memory Cells with NAND Gates")

Germany Application No. 1120060040022, Patent No. --------, filed 23-February-2009 ("NBTI-resistente Speicherzellen mit Nand-Gliedern")
Japan Patent No. JP5095741, published 12-December-2012 ("NBTI-Resistant Memory Cells with NAND Gates")
China Patent No. CN101506899B, issued 6-February-2013 ("With the recovery of the negation gate about the nbti storage unit")
Republic of Korea Patent No. 1010590620000, issued 31-May-2011 ("NBTI-Resistant Memory Cells with NAND Gates")

"Detection of Transient Errors by Means of New Selective Implementation"
Xavier Vera, Oguz Ergin, Osman Unsal, Jaume Abella, Antonio González
International Application No. PCT/ES2006/070041
USPTO Patent No. 8,402,310, issued 19-March-2013 ("Detecting Soft Errors Via Selective Re-execution")
USPTO Patent No. 8,090,996, issued 3-January-2012 ("Detecting Soft Errors Via Selective Re-execution")
China Patent No. CN101416163B, published 16-October-2013 ("Through choosing to re-carry out to detect transient state error")
Republic of Korea Patent No. 1009905910000, issued 30-July-2010 ("Detection of Transient Errors by Means of New Selective Implementation")

"Improvement in the Reliability of a Multi-Core Processor"
Xavier Vera, Osman Unsal, Oguz Ergin, Jaume Abella, Antonio González
International Application No. PCT/ES2006/070021
USPTO Patent No. 8,074,110, issued 6-December-2011 ("Enhancing Reliability of a Many-Core Processor")

Japan Patent No. JP4653841, issued 16-March-2011 ("Enhancing Reliability of a Many-Core Processor")
China Patent No. CN101390067B, issued 5-December-2012 ("Reinforced with a many-core processor reliability")

"Dynamic Estimation of the Lifetime of a Semiconductor Device"
Xavier Vera, Jaume Abella, Osman Unsal, Oguz Ergin, Antonio González
International Application No. PCT/ES2005/070188
USPTO Patent No. 8,151,094, issued 3-April-2012 ("Dynamically Estimating Lifetime of a Semiconductor Device")

Germany Application No. DE112005003788T5, published 7-May-2014 ("Dynamische Abschätzung der Lebensdauer einer Halbleitereinrichtung")
China Patent No. CN101313226B, issued 13-February-2013 ("Of semiconductor device the using life of the dynamic estimation method and apparatus for")


BOOK CHAPTERS

"Chapter 9: Harsh computing in the space domain"
Jaume Abella, Francisco J. Cazorla
Rugged Embedded Systems, 1st Edition. Computing in Harsh Environments, by A. Vega, P. Bose, A. Buyuktosunoglu
Morgan Kaufmann, ISBN: 9780128024591, December-2016

PARTICIPATION IN PROJECTS

FRACTAL: A Cognitive Fractal and Secure EDGE based on an unique Open-Safe-Reliable-Low Power Hardware Platform Node
H2020-ECSEL project number 877056
From 1-September-2020 until 31-August-2023
MASTECS: Multicore Analysis Service and Tools for Embedded Critical Systems
H2020-ICT project number 878752
From 1-December-2019 until 30-November-2021
SELENE: Self-monitored Dependable platform for High-Performance Safety-Critical Systems
H2020-ICT project number 871467
From 1-December-2019 until 30-November-2022
De-RISC: Dependable Real-time Infrastructure for Safety-critical Computer
H2020-EIC-FTI project number 869945
From 1-October-2019 until 31-March-2022
EPI SGA1: European Processor Initiative (Specific Grant Agreement 1)
H2020-SGA-LPMT project number 826647
From 1-December-2018 until 30-November-2021
SuPerCom: Sustainable Performance for High-Performance Embedded Computing Systems
ERC project number 772773
From 1-June-2018 until 31-May-2023
RECIPE: REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems
H2020-FETHPC project number 801137
From 1-April-2018 until 31-March-2021
GPU4S: Low Power GPU solutions for high performance on-board data processing
ESA AO/1-9010/17/NL/AF
From 1-May-2018 until 30-April-2019
SAFURE: Safety And Security By Design For Interconnected Mixed-Critical Cyber-Physical Systems
H2020-ICT project number 644080
From 1-February-2015 until 31-January-2018
PROARTIS for Space - Schedulability Analysis Techniques and Tools for Cached and Multicore Processors
ESA ITT Ref AO/1-7646/13/NL/JK
From 1-February-2014 until 31-January-2015
Multi-Core Architectures - Cache Structure Optimisation for better RT Performance
ESA project number RFP PFL-PTE/HK/mo/789.2013
From 1-November-2013 until 30-April-2014
PROXIMA: Probabilistic real-time control of mixed-criticality multicore and manycore systems
FP7-ICT project number 611085
From 1-October-2013 until 30-September-2016
P-SOCRATES: Parallel Software Framework for Time-Critical Many-Core Systems
FP7-ICT project number 611016
From 1-October-2013 until 30-September-2016
Multicore OS Benchmark CCN: GR712C
ESA project number RFQ- 3-13153 extension
From 1-October-2012 until 31-May-2013
VeTeSS: Verification and Testing to Support Functional Safety Standards
ARTEMIS project number 295311
From 1-May-2012 until 30-April-2015
parMERASA: Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability
FP7-ICT project number 287519
From 1-October-2011 until 31-September-2014
PROARTIS: Probabilistically Analysable Real-Time Systems
FP7-ICT project number 249100
From 1-February-2010 until 31-July-2013
MHAOTEU: Memory Hierarchy Analysis and Optimization Tools for End Users
FP4 Esprit 4 RTD project number 24942
From 16-June-1999 until 30-June-2001

PROGRAM COMMITTEE AND CONFERENCE PARTICIPATIONS

Program Committee Member

RTAS 2021: IEEE Real-Time and Embedded Technology and Applications Symposium
DFT 2021, 2020: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
ICCD 2020, 2019: IEEE International Conference on Computer Design
DATE (2020 as Track Chair), 2019, 2018, 2017, 2016, 2015, 2014, 2013, 2012, 2011: IEEE/ACM Design Automation & Test in Europe Conference
IOLTS 2020, 2019, 2018, 2017, 2016, 2015, 2014, 2013, 2012, 2011: IEEE International On-Line Testing Symposium
SELSE 2021, 2020, 2018, 2017, 2016, 2015, 2014: Workshop on Silicon Errors in Logic - System Effects
NG-RES 2021, 2020: Workshop on Next Generation Real-Time Embedded Systems
SIES 2018: IEEE International Symposium on Industrial Embedded Systems
WCET 2018, 2015: International Workshop on Worst-Case Execution Time Analysis
FDL 2015: 10th IEEE/ECSI Forum on specification & Design Languages, special session on "High Integrity Multi-Core Modelling for Future Systems (Hi-MCM)"
IPDPS 2008: 22nd IEEE International Parallel and Distributed Processing Symposium

Session Chair/Co-chair

DATE 2014, 2012, 2011, 2010: Design Automation & Test in Europe Conference
IOLTS 2012, 2011: IEEE International On-Line Testing Symposium

Others

Co-organizer of the Workshop De-RISC: Dependable Real-Time Safety-Critical RISC-V based Platforms at HiPEAC 2021
Co-organizer of the Workshop on High-performance computing platforms for dependable autonomous systems at DSN 2020
Track Chair for "T: Test" at DATE 2020
Topic Chair for "T3: Microarchitectural Dependability" at DATE 2019
Topic Chair for "T4: On-Line Test, Fault Tolerance and Robust Systems" at DATE 2018
Topic Co-chair for "T4: On-Line Test, Fault Tolerance and Robust Systems" at DATE 2017
Panelist on "Predictable System Timing - Probab(ilistical)ly?" at DAC 2016: 53rd Design Automation Conference (Austin (Texas), 5-9 June 2016)
Co-organizer of the "Thematic Session on Challenges in Mixed Criticality and Real-time and Reliability in Networked Complex Embedded Systems" at HiPEAC Computing Systems Week, (Barcelona (Spain), 15 May 2014)
Panelist on "Manycore Mixed-Criticality Systems" at MCS 2014: 2nd International Workshop on the Integration of Mixed-Criticality Subsystems on Multicore and Manycore Processors (Vienna (Austria), 21-22 January 2014)
Special session organizer in IOLTS 2011: 17th International On-Line Testing Symposium (Athens (Greece), 13-15 July 2011)

PAPER REVIEWS

Journals:
IEEE Computer
IEEE Micro
IEEE Transactions on Computers
IEEE Computer Architecture Letters
IEEE Transactions on Computer Aided-Design
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on VLSI Design
IEEE Transactions on Device and Materials Reliability
IEEE Transactions on Sustainable Computing
ACM Transactions on Architecture and Compiler Optimization
ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Embedded Computing Systems
ACM Transactions on Emerging Topics in Computing
Elsevier Microprocessors and Microsystems Journal
Elsevier VLSI Journal
Elsevier Journal of Systems Architecture
Elsevier Microelectronics Journal
Elsevier Journal of Parallel and Distributed Computing
Elsevier Computer Languages, Systems and Structures Journal
Springer Journal of Electronic Testing: Theory and Applications
ASP Journal of Low Power Electronics
Wiley Concurrency and Computation: Practice and Experience
Conferences (design automation and electronics):
Design Automation Conference (DAC)
Design Automation and Test in Europe (DATE)
International Conference on Computer Design (ICCD)
International Conference on Electronics, Circuits and Systems (ICECS)
Conferences (embedded systems):
Real-Time Applications and Systems (RTAS)
European Conference on Real-Time Systems (ECRTS)
Symposium on Applied Computing (SAC)
Languages, Compilers, and Tools for Embedded Systems (LCTES)
Workshop on Worst-Case Execution Time Analysis (WCET)
Conferences (dependability):
Dependable Systems and Networks (DSN)
International On-Line Testing Symposium (IOLTS)
Workshop on Silicon Errors in Logic - System Effects (SELSE)
IARIA International Conference on Advances in System Testing and Validation Lifecycle (VALID)
Conferences (computer architecture):
International Symposium on Computer Architecture (ISCA)
International Symposium on Microarchitecture (MICRO)
International Symposium on High Performance Computer Architecture (HPCA)
International Conference on High-Performance Computing (HiPC)
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
International Conference on Code Generation and Optimization (CGO)
International Conference on Computing Frontiers (CF)
Annual Workshop on the Interaction between Compilers and Computer Architecture (INTERACT)
Conferences (parallel computing):
International Conference on Supercomputing (ICS)
International Conference on Parallel Architectures and Compilation Techniques (PACT)
International Parallel and Distributed Processing Symposium (IPDPS)
International EUROPAR Conference. European Conference on Parallel and Distributed Computing (EuroPAR)
Conferences (performance analysis):
International Symposium on Performance Analysis of Systems and Software (ISPASS)
International Symposium on Workload Characterizatio (IISWC)