Jose-Maria Arnau
UPC - BarcelonaTech
C6-115 Campus Nord UPC
C\Jordi Girona 1-3
08034 Barcelona, Spain
Phone: +34 9340 54039
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Short Biography
I am a distinguished researcher at UPC BarcelonaTech. I work in the ARCO (ARchitectures and COmpilers) research group hosted in the Computer Architecture Department. I received BSc in Computer Engineering from the Universitat Jaume I, and MSc and Ph.D. on Computer Architecture from the UPC. My thesis was done under the supervision of Dr. Polychronis Xekalakis and Prof. Joan-Manuel Parcerisa.
Current Research
My research focuses on energy-efficient hardware architectures for cognitive computing. I work on novel techniques to improve the energy-efficiency of Domain Specific Accelerators for deep learning, considering both FPGA and ASIC solutions. My research also explores techniques to improve GPGPU architectures for graph-processing and machine learning workloads.
- Current PhD students:
- Daniel Pinto. Energy-Efficient Architectures for Human-Quality Speech Recognition Systems.
- Raul Taranco. Low-power, High-performance Architectures for Camera-based Autonomous Driving.
- Pedro Exenberger
- Mojtaba Abaie
- Bahareh Khabbazan
- Graduated PhD students (first job after PhD in parenthesis):
- Hamid Tabani. Low-Power Architectures for Automatic Speech Recognition. (BSC)
- Reza Yazdani. Ultra Low-Power, High Performance Accelerator for Speech Recognition. (Microsoft)
- Marc Riera. Low-Power Accelerators for Cognitive Computing. (UPC)
- Albert Segura. High-Performance and Energy-Efficient Irregular Graph Processing on GPU architectures. (Apple)
- Franyell Silfa. Energy-Efficient Architectures for Recurrent Neural Networks. (UASD)
Publications
Peer-Reviewed Conferences:
- “Design and Evaluation of an Ultra Low-Power Human-Quality Speech Recognition System”. Dennis Pinto, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the 16th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC), January 2021.
- "Boosting LSTM Performance Through Dynamic Precision Selection". Franyell Silfa, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the 27th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC), December 2020.
- "Demystifying Power and Performance Bottlenecks in Autonomous Driving Systems". Pedro Exenberger, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the IEEE International Symposium
on Workload Characterization (IISWC), October 2020.
- "Neuron-Level Fuzzy Memoization in RNNs". Franyell Silfa, Gem Dot, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the 52nd IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2019.
- “Leveraging Run-Time Feedback for Efficient ASR Acceleration”. Reza Yazdani, Jose-Maria Arnau, Antonio González. In Proceeding of the 28th International Conference on Parallel Architectures and Compilation Techniques (PACT), September 2019, pp. 462-463.
- "SCU: A GPU Stream Compaction Unit for Graph Processing". Albert Segura, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the 46th International Symposium on Computer Architecture (ISCA), June 2019.
- "E-PUR: An Energy-Efficient Processing Unit for Recurrent Neural Networks". Franyell Silfa, Gem Dot, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques (PACT), November 2018.
- "Computation Reuse in DNNs by Exploiting Input Similarity". Marc Riera, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the 45th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2018.
- "The Dark Side of DNN Pruning". Reza Yazdani Aminabadi, Marc Riera, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the 45th IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2018.
- “A Novel Register Renaming Technique for Out-of-Order Processors”. Hamid Tabani, Jose-Maria Arnau, Jordi Tubella, Antonio Gonzalez. In Proceedings of the 24th IEEE International Symposium on High-Performance Computer Architecture (HPCA), February 2018.
- "UNFOLD: A Memory-Efficient Speech Recognizer Using On-The-Fly WFST Composition". Reza Yazdani Aminabadi, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), October 2017.
- "An Ultra Low-Power Hardware Accelerator for Acoustic Scoring in Speech Recognition". Hamid Tabani, Jose-Maria Arnau, Jordi Tubella, Antonio Gonzalez. In Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques (PACT), September 2017.
- "An Ultra Low-Power Hardware Accelerator for Automatic Speech Recognition". Reza Yazdani Aminabadi, Albert Segura, Jose-Maria Arnau, Antonio Gonzalez. In Proceedings of the IEEE/ACM
International Symposium on Microarchitecture (MICRO), October 2016. PDF
- “Eliminating Redundant Fragment Shader Executions on a Mobile GPU via Hardware Memoization” .
Jose-Maria Arnau, Joan-Manuel Parcerisa and Polychronis Xekalakis. In Proceedings of the 41st
IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2014. PDF Slides
- “Parallel Frame Rendering: Trading Responsiveness for Energy on a Mobile GPU” . Jose-Maria Arnau,
Joan-Manuel Parcerisa and Polychronis Xekalakis. In Proceedings of the 22nd IEEE/ACM International
Conference on Parallel Architectures and Compilation Techniques (PACT), September 2013. PDF Slides
- “TEAPOT: A Toolset for Evaluating Performance, Power and Image Quality on Mobile Graphics
Systems” . Jose-Maria Arnau, Joan-Manuel Parcerisa and Polychronis Xekalakis . In Proceedings of the
27th ACM International Conference on Supercomputing (ICS), June 2013. PDF Slides
- “Boosting Mobile GPU Performance with a Decoupled Access/Execute Fragment Processor”. Jose-Maria
Arnau, Joan-Manuel Parcerisa and Polychronis Xekalakis . In Proceedings of the 39th IEEE/ACM
International Symposium on Computer Architecture (ISCA), June 2012. PDF Slides
Peer-Reviewed Journals:
-
"Design and Evaluation of an Ultra Low-Power Human-Quality Speech Recognition System". Dennis Pinto, Jose-Maria Arnau and Antonio Gonzalez. ACM Transactions on Architecture and Code Optimization (TACO). 17, 4, Article 41 (November 2020), 19 pages. doi: https://doi.org/10.1145/3425604
- "LAWS: Locality-AWare Scheme for Automatic Speech Recognition". Reza Yazdani, Jose-Maria Arnau and Antonio Gonzalez. IEEE Transactions on Computers, vol. 69, no. 8, pp. 1197-1208, 1 Aug. 2020, doi: 10.1109/TC.2020.2991002.
- "A Low-Power, High-Performance Speech Recognition Accelerator". Reza Yazdani, Jose-Maria Arnau and Antonio Gonzalez. IEEE Transactions on Computers. doi: 10.1109/TC.2019.2937075
- "CGPA: Coarse-Grained Pruning of Activations for Energy-Efficient RNN Inference". Marc Riera, Jose-Maria Arnau and Antonio Gonzalez. IEEE Micro. doi: 10.1109/MM.2019.2929742
- "Performance Analysis and Optimization of Automatic Speech Recognition". Hamid Tabani, Jose-Maria Arnau, Jordi Tubella and Antonio Gonzalez. IEEE Transactions on Multi-Scale Computing Systems (TMSCS), vol. 4, no. 4, pp. 847-860, 2018.
- "Low-Power Automatic Speech Recognition Through a Mobile GPU and a Viterbi Accelerator". Reza Yazdani, Albert Segura, Jose-Maria Arnau and Antonio Gonzalez. IEEE Micro, vol. 37, no. 1, 2017, pp. 22-29.
- “Study of the Pressing Operation of Large-sized Tiles Using X-ray Absorption”. J.L. Amoros, G. Mallol, D. Llorens, J. Boix, J.M. Arnau, C.Feliu, J.A. Cerisuelo and J.J. Gargallo. Journal of the Spanish Ceramic and Glass Society, vol. 49, no. 4, pp. 279-288, 2010.
- “Apparent Density Measurement of the Ceramic Tiles in a Quick, Harmless and Non-destructive Way”. G. Mallol, D. Llorens, J. Boix, M. Aguilella, L. Foucard and J.M. Arnau. Journal of the Spanish Ceramic and Glass Society, vol. 49, no. 6, pp. 393-398, 2010.
Past Research
My past research focused on energy-efficient architectures for mobile GPUs:
